Intel Chip ID FPGA IP Cores

Intel® FPGA e 'ngoe le e 'ngoe e tšehelitsoeng e na le ID ea chip ea 64-bit e ikhethang. Chip ID Intel FPGA IP cores e u lumella ho bala ID ea chip bakeng sa boitsebiso ba sesebelisoa.

Lintlha Tse Amanang

• Kenyelletso ea Intel FPGA IP Cores
  • E fana ka tlhaiso-leseling e akaretsang mabapi le li-cores tsohle tsa Intel FPGA IP, ho kenyelletsa le parameterizing, ho hlahisa, ho ntlafatsa, le ho etsisa li-cores tsa IP.
• Ho Hlahisa Sengoloa se Kopantsoeng sa ho Seta sa Simulator
  • Etsa mongolo oa papiso o sa hlokeng lintlafatso tsa software kapa lintlafatso tsa mofuta oa IP.

Tšehetso ea lisebelisoa

IP Cores	Lisebelisoa tse Tšehetsoeng
Chip ID Intel Stratix® 10 FPGA IP ea mantlha	Intel Stratix 10
Unique Chip ID Intel Arria® 10 FPGA IP ea mantlha	Intel Arria 10
Unique Chip ID Intel Cyclone® 10 GX FPGA IP ea mantlha	Intel Leholiotsoana 10 GX
E Ikhethang Chip ID Intel MAX® 10 FPGA IP	Intel MAX 10
E ikhethang Chip ID Intel FPGA IP ea mantlha	Stratix V Arria V Leholiotsoana V

Lintlha Tse Amanang

• E Ikhethang Chip ID Intel MAX 10 FPGA IP Core

Chip ID Intel Stratix 10 FPGA IP Core

• Karolo ena e hlalosa Chip ID Intel Stratix 10 FPGA IP core.

Tlhaloso ea Ts'ebetso

Lets'oao la data_valid le qala tlase maemong a qalang moo ho seng data e baloang sesebelisoa. Kamora ho fepa pulse e holimo ho ea tlase boema-kepeng bo kentsoeng bo baloang, Chip ID Intel Stratix 10 FPGA IP e bala ID ea chip e ikhethang. Ka mor'a ho bala, IP core e fana ka letšoao la data_valid ho bontša hore boleng bo ikhethang ba chip ID boema-kepe bo se bo loketse ho khutlisoa. Opereishene e pheta feela ha o seta setsi sa IP bocha. The chip_id[63:0] port port e na le boleng ba ID e ikhethang ea chip ho fihlela o lokisa sesebelisoa kapa o seta konokono ea IP bocha.

Hlokomela: Ha o khone ho etsisa Chip ID IP core hobane IP core e fumana karabo ho data ea chip ID ho tsoa ho SDM. Ho netefatsa motheo ona oa IP, Intel e khothaletsa hore o etse tlhahlobo ea hardware.

Boema-kepe

Setšoantšo sa 1: Chip ID Intel Stratix 10 FPGA IP Core Ports

Lethathamo la 2: Chip ID Intel Stratix 10 FPGA IP Core Ports Tlhaloso

Boema-kepe	I/O	Boholo (Bit)	Tlhaloso
klk	Kenyeletso	1	E fepa lets'oao la oache ho block ID ea chip. Maqhubu a phahameng a tšehetsoeng a lekana le oache ea hau ea sistimi.
tsosolosa	Kenyeletso	1	Synchronous reset e setang motheo oa IP bocha. Ho seta konokono ea IP bocha, etsa hore lets'oao la reset le phahame bakeng sa li-cycle tse 10 tsa clkin.
data_e sebetsa	Sephetho	1	E bontša hore ID e ikhethang ea chip e se e loketse ho khutlisoa. Haeba lets'oao le le tlase, IP core e maemong a pele kapa e ntse e tsoela pele ho kenya data ho tsoa ho fuse ID. Kamora hore IP core e fane ka lets'oao, data e se e loketse ho khutlisoa ho chip_id [63..0] port port.
chip_id	Sephetho	64	E bonts'a ID ea chip e ikhethileng ho latela sebaka sa ID sa fuse. Lintlha li sebetsa feela ka mor'a hore IP core e fane ka letšoao la data_valid. Boleng ba matla-up bo khutlela ho 0. The chip_id [63:0]output port e na le boleng ba chip ID e ikhethileng ho fihlela o lokisa sesebelisoa kapa o seta konokono ea IP bocha.
badile	Kenyeletso	1	Letšoao le baloang le sebelisetsoa ho bala boleng ba ID ho tsoa sesebelisoa. Nako le nako ha lets'oao le fetola boleng ho tloha ho 1 ho isa ho 0, mantlha ea IP e etsa hore ts'ebetso ea ID e baloe. U tlameha ho khanna lets'oao ho 0 ha le sa sebelisoe. Ho qala ts'ebetso ea ID ea ho bala, khanna lets'oao holimo bakeng sa lipotoloho tse 3 tsa oache, ebe u le hulela tlase. IP ea mantlha e qala ho bala boleng ba ID ea chip.

Ho fihlella Chip ID Intel Stratix 10 FPGA IP ka Signal Tap

Ha o fetola lets'oao le baloang, Chip ID Intel Stratix 10 FPGA IP mantlha e qala ho bala ID ea chip ho sesebelisoa sa Intel Stratix 10. Ha chip ID e se e lokile, Chip ID Intel Stratix 10 FPGA IP core e fana ka lets'oao la data_valid mme e felisa J.TAG phihlello.

Hlokomela: Lumella tieho e lekanang le tCD2UM ka mor'a ho lokisa chip pele u leka ho bala ID e ikhethang ea chip. Sheba lethathamo la lintlha tsa sesebelisoa bakeng sa boleng ba tCD2UM.

Ho tsosolosa Chip ID Intel Stratix 10 FPGA IP Core

Ho seta konokono ea IP bocha, o tlameha ho fana ka lets'oao la reset bonyane lipotoloho tse leshome tsa oache.

Hlokomela

1. Bakeng sa lisebelisoa tsa Intel Stratix 10, u se ke ua tsosolosa IP core ho fihlela bonyane tCD2UM ka mor'a hore chip e qalisoe ka botlalo. Sheba lethathamo la lintlha tsa sesebelisoa bakeng sa boleng ba tCD2UM.
2. Bakeng sa litataiso tsa IP core instantiation, o tlameha ho bua ka Intel Stratix 10 Reset Release IP karolo ho Intel Stratix 10 Configuration User Guide.

Lintlha Tse Amanang

Intel Stratix 10 Configuration User Guide

• E fana ka lintlha tse ling mabapi le Intel Stratix 10 Reset Release IP.

Chip ID Intel FPGA IP Cores

Karolo ena e hlalosa li-cores tse latelang tsa IP

• Unique Chip ID Intel Arria 10 FPGA IP ea mantlha
• Unique Chip ID Intel Cyclone 10 GX FPGA IP ea mantlha
• E ikhethang Chip ID Intel FPGA IP ea mantlha

Tlhaloso ea Ts'ebetso

Lets'oao la data_valid le qala tlase maemong a qalang moo ho seng data e baloang sesebelisoa. Kamora ho fepa lets'oao la oache boema-kepeng ba ho kenya clkin, setsi sa Chip ID Intel FPGA IP se bala ID ea chip e ikhethang. Ka mor'a ho bala, IP core e fana ka letšoao la data_valid ho bontša hore boleng bo ikhethang ba chip ID boema-kepe bo se bo loketse ho khutlisoa. Opereishene e pheta feela ha o seta setsi sa IP bocha. The chip_id[63:0] port port e na le boleng ba ID e ikhethang ea chip ho fihlela o lokisa sesebelisoa kapa o seta konokono ea IP bocha.

Hlokomela: Intel Chip ID IP core ha e na mohlala oa papiso files. Ho netefatsa motheo ona oa IP, Intel e khothaletsa hore o etse tlhahlobo ea hardware.

Setšoantšo sa 2: Chip ID Intel FPGA IP Core Ports

Lethathamo la 3: Chip ID Intel FPGA IP Core Ports Tlhaloso

Boema-kepe	I/O	Boholo (Bit)	Tlhaloso
klk	Kenyeletso	1	E fepa lets'oao la oache ho block ID ea chip. Maqhubu a phahameng a tšehetsoeng ke a latelang: • Bakeng sa Intel Arria 10 le Intel Cyclone 10 GX: 30 MHz. • Bakeng sa Intel MAX 10, Stratix V, Arria V le Cyclone V: 100 MHz.
tsosolosa	Kenyeletso	1	Synchronous reset e setang motheo oa IP bocha. Ho seta konokono ea IP bocha, etsa hore lets'oao la ho seta bocha le phahame bakeng sa li-cycles tsa clkin tse 10(1). The chip_id [63:0]output port e na le boleng ba chip ID e ikhethileng ho fihlela o lokisa sesebelisoa kapa o seta konokono ea IP bocha.
data_e sebetsa	Sephetho	1	E bontša hore ID e ikhethang ea chip e se e loketse ho khutlisoa. Haeba lets'oao le le tlase, IP core e maemong a pele kapa e ntse e tsoela pele ho kenya data ho tsoa ho fuse ID. Kamora hore IP core e fane ka lets'oao, data e se e loketse ho khutlisoa ho chip_id [63..0] port port.
chip_id	Sephetho	64	E bonts'a ID ea chip e ikhethileng ho latela sebaka sa ID sa fuse. Lintlha li sebetsa feela ka mor'a hore IP core e fane ka letšoao la data_valid. Boleng ba matla-up bo khutlela ho 0.

Ho fihlella Unique Chip ID Intel Arria 10 FPGA IP le Unique Chip ID Intel Cyclone 10 GX FPGA IP ka Signal Tap

Hlokomela: Intel Arria 10 le Intel Cyclone 10 GX chip ID ha li fumanehe haeba u na le litsamaiso tse ling kapa li-cores tsa IP tse kenang J.TAG ka nako e le nngwe. Bakeng sa mohlalaample, Signal Tap II Logic Analyzer, Transceiver Toolkit, lipontšo tsa in-system kapa probes, le SmartVID Controller IP core.

Ha o fetola lets'oao la ho seta bocha, Unique Chip ID Intel Arria 10 FPGA IP le Unique Chip ID Intel Cyclone 10 GX FPGA IP cores qala ho bala ID ea chip ho tsoa hoIntel Arria 10 kapa Intel Cyclone 10 GX sesebelisoa. Ha chip ID e se e lokile, Unique Chip ID Intel Arria 10 FPGA IP le Unique Chip ID Intel Cyclone 10 GX FPGA IP cores e fana ka lets'oao la data_valid mme e felisa J.TAG phihlello.

Hlokomela: Lumella tieho e lekanang le tCD2UM ka mor'a ho lokisa chip pele u leka ho bala ID e ikhethang ea chip. Sheba lethathamo la lintlha tsa sesebelisoa bakeng sa boleng ba tCD2UM.

Ho tsosolosa Chip ID Intel FPGA IP Core

Ho seta konokono ea IP bocha, o tlameha ho fana ka lets'oao la reset bonyane lipotoloho tse leshome tsa oache. Kamora hore o tlose lets'oao la ho seta bocha, IP-core e bala hape ID e ikhethang ea chip ho tsoa ho block ID ea fuse. IP core e fana ka lets'oao la data_valid kamora ho qeta ts'ebetso.

Hlokomela: Bakeng sa lisebelisoa tsa Intel Arria 10, Intel Cyclone 10 GX, Intel MAX 10, Stratix V, Arria V, le Cyclone V, u se ke ua tsosolosa IP core ho fihlela bonyane tCD2UM ka mor'a hore chip e qalisoe ka botlalo. Sheba lethathamo la lintlha tsa sesebelisoa bakeng sa boleng ba tCD2UM.

Chip ID Intel FPGA IP Cores User Guide Archives

Haeba mofuta oa IP core o sa thathamisoa, ho sebetsa tataiso ea mosebelisi bakeng sa mofuta o fetileng oa IP.

IP Core Version	Bukana ea Mosebelisi
18.1	Chip ID Intel FPGA IP Cores User Guide
18.0	Chip ID Intel FPGA IP Cores User Guide

Nalane ea Tokomane ea Tokomane bakeng sa Tataiso ea Mosebelisi ea Chip ID ea Intel FPGA IP Cores

Tokomane Version	Intel Quartus® Prime Version	Liphetoho
2022.09.26	20.3	E tlositsoe Mekhoa e Metle ea Tsamaiso ea Morero sehokelo. E ntlafalitsoe Tlhaloso ea Ts'ebetso ho Chip ID Intel Stratix 10 FPGA IP Core. E ntlafalitsoe Tlhaloso ea Ts'ebetso ho Chip ID Intel FPGA IP Cores.
2020.10.05	20.3	E ntlafalitse tlhaloso ea clkin le resetports ho Lethathamo: Chip ID Intel FPGA IP Core Ports Tlhaloso ho kenyelletsa lintlha tsa Intel MAX 10. Ntjhafatswa ya Ho tsosolosa Chip ID Intel FPGA IP Core karolo ea ho kenyelletsa tšehetso bakeng sa sesebelisoa sa Intel MAX 10.
2019.05.17	19.1	Ntjhafatswa ya Ho tsosolosa Chip ID Intel Stratix 10 FPGA IP Core sehlooho sa ho kenyelletsa lintlha tsa bobeli mabapi le tataiso ea mantlha ea IP.
2019.02.19	18.1	Tšehetso e ekelitsoeng bakeng sa lisebelisoa tsa Intel MAX 10 ho IP Cores le lisebelisoa tse tšehelitsoeng tafole.
2018.12.24	18.1	E kenyelelitsoe Chip ID Intel FPGA IP Cores User Guide Archives karolo.  E hlophisitse bocha tokomane ho fana ka lintlha tse ling mabapi le lisebelisoa tse tšehetsoeng.
2018.06.08	18.0	E ntlafalitse tlhaloso ea boema-kepe e baliloeng. E ntlafalitse tlhaloso ea boema-kepe.
2018.05.07	18.0	E kenyellelitsoe boema-kepe bo baloang bakeng sa Chip ID Intel Stratix 10 FPGA IP IP core.

 

Letsatsi	Phetolelo	Liphetoho
Tšitoe 2017	2017.12.11	Sehlooho sa tokomane se ntlafalitsoeng ho tloha ho Altera Unique Chip ID IP Core User Guide. E kentsoe Tšehetso ea lisebelisoa karolo.  Lintlha tse kopantsoeng le tse ekelitsoeng ho tsoa ho Altera Arria 10 Unique Chip ID IP Core User Guide le Stratix 10 Unique Chip ID IP Core User Guide. E fetoletsoe ho Intel. E ntlafalitsoe Tlhaloso ea Ts'ebetso. Ts'ehetso ea lisebelisoa tsa Intel Cyclone 10 GX.
Motšeanong 2016	2016.05.02	E tlositse tlhahisoleseling ea mantlha ea IP mme e kenyellelitse sehokelo ho Quartus Prime Handbook. Tsebiso e ntlafalitsoeng mabapi le tšehetso ea sesebelisoa sa Arria 10.
Loetse, 2014	2014.09.02	• Sehlooho se ntlafalitsoeng sa tokomane ho hlahisa lebitso le lecha la "Altera Unique Chip ID" IP core.

Letsatsi	Phetolelo	Liphetoho
Phato, 2014	2014.08.18	Mehato e ntlafalitsoeng ea parameterization bakeng sa mohlophisi oa parametha ea lefa. Tsebiso e kenyellelitsoeng hore setsi sena sa IP ha se tšehetse meralo ea Arria 10.
Phuptjane 2014	2014.06.30	Tlhahisoleseding ea Motsamaisi oa plug-In ea MegaWizard e nkeloe sebaka ka IP Catalog. E kentse lintlha tse tloaelehileng mabapi le ho ntlafatsa li-cores tsa IP. E kenyelelitsoe lintlha tse tloaelehileng tsa ho kenya le ho fana ka laesense. E tlositse lintlha tsa khale tsa boemo ba ts'ehetso ea lisebelisoa. Tšehetso ea lisebelisoa tsa mantlha tsa IP e se e fumaneha ho IP Catalog le parameter editor.
Loetse, 2013	2013.09.20	E ntlafalitsoe hore e fetole lentsoe "Ho fumana ID ea chip ea sesebelisoa sa FPGA" ho "Fumana ID e ikhethang ea chip ea sesebelisoa sa FPGA"
Ka May, 2013	1.0	Tokollo ea pele.

Romella Maikutlo

Litokomane / Lisebelisoa

Intel Chip ID FPGA IP Cores [pdf] Bukana ea Mosebelisi Chip ID FPGA IP Cores, Chip ID, FPGA IP Cores, IP Cores

Litšupiso

• Bukana ea Mosebelisi