eSRAM Intel FPGA IP
Tlhahisoleseding ya Sehlahiswa
Sehlahisoa ke Intel FPGA IP, e tsamaellanang le software ea Intel Quartus Prime Design Suite. IP e na le liphetolelo tse fapaneng tse lumellanang le mefuta ea software ho fihlela v19.1. Ho qala ho tsoa ho software version 19.2, ho hlahisoa leano le lecha la phetolelo bakeng sa Intel FPGA IP.
Liphetolelo tsa IP ke tse latelang:
| Phetolelo | Letsatsi | Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
|---|---|---|---|---|
| v20.1.0 | 2022.09.26 | 22.3 | Khokahano ea karolo ea sistimi ea Intel AgilexTM eSRAM IP tšehetso ho sesebelisoa sa Moqapi oa Platform. |
ISO 9001:2015 E Ngolisitsoe |
| v20.0.0 | 2021.10.04 | 21.3 | E ntlafalitse ch{0-7}_ecc_dec_eccmode le ch{0-7}_ecc_enc_eccmode paramethara ho ECC_DISABLED bakeng sa likou tse sa sebelisoeng. |
Ntlafatso ea IP ea hlokahala ho fumana pokello ea phallo ea moralo ka Intel Quartus Prime Pro Edition software version 21.3. |
| v19.2.1 | 2021.06.29 | 21.2 | Lokisa tlolo ea molao ka ho eketsa (* altera_attribute = -name HYPER_REGISTER_DELAY_CHAIN 100*) ho eSRAM Intel Agilex FPGA IP. |
Phetoho ke ea boikhethelo. Ho hlokahala ntlafatso ea IP haeba IP ea hau ha e khone ho fihlela maemo a holimo a ts'ebetso ka lebaka la ho ts'oara tlolo. |
| v19.2.0 | 2020.12.14 | 19.4 | E tlositse encoder e matla ea ECC le decoder - bypass tšobotsi. |
N/A |
| v19.1.1 | 2019.07.01 | 19.2 | Tokollo ea pele ea lisebelisoa tsa Intel Agilex. | N/A |
Haeba lengolo la tokollo le le sieo bakeng sa mofuta o itseng oa IP, ho bolela hore ha ho na liphetoho phetolelong eo.
Hlokomela: Nomoro ea Intel FPGA IP (XYZ) e ka fetoha ka mofuta o mong le o mong oa software ea Intel Quartus Prime.
Litaelo tsa Tšebeliso ea Sehlahisoa
Ho sebelisa Intel FPGA IP, latela mehato ena:
- Netefatsa hore o na le software e tsamaellanang ea Intel Quartus Prime Design Suite e kentsoeng tsamaisong ea hau.
- Khoasolla mofuta o tsamaellanang oa Intel FPGA IP o tsamaellanang le mofuta oa software ea hau.
- Tlosa IP e jarollotsoeng files sebakeng se loketseng khomphuteng ya hao.
- Bula software ea Intel Quartus Prime 'me u thehe projeke e ncha kapa u bule projeke e teng.
- Litlhophisong tsa projeke kapa lethathamong la IP, fumana 'me u kenye Intel FPGA IP morerong oa hau.
- Beha li-parameter tsa IP ho latela litlhoko tsa hau.
- Hokela IP ho likarolo tse ling kapa limmojule moralong oa hau u sebelisa sesebelisoa sa Moqapi oa Sethala.
- Netefatsa hore lintlafatso life kapa life tse hlokahalang tsa IP lia etsoa haeba li boletsoe tlhahisoleseling ea sehlahisoa.
- Kopanya le ho netefatsa moralo oa hau u sebelisa software ea Intel Quartus Prime.
- Tsoela pele ka mehato e meng ho latela litlhoko tsa moralo oa hau le lipheo tsa projeke.
eSRAM Intel® Agilex™ FPGA IP
Lintlha tsa Phatlalatso
Haeba lengolo la tokollo le le sieo bakeng sa mofuta o itseng oa IP, IP ha e na liphetoho ho mofuta oo. Bakeng sa tlhahisoleseling mabapi le lintlafatso tsa IP ho fihla ho v18.1, sheba Lintlha tsa Phatlalatso tsa Intel® Quartus® Prime Design Suite Update.
Liphetolelo tsa Intel FPGA IP li tsamaisana le mefuta ea software ea Intel Quartus Prime Design Suite ho fihlela v19.1. Ho qala ka Intel Quartus Prime Design Suite software version 19.2, Intel FPGA IP e na le leano le lecha la phetolelo.
Nomoro ea Intel FPGA IP (XYZ) e ka fetoha ka mofuta o mong le o mong oa software ea Intel Quartus Prime.
- X e bontša phetoho e kholo ea IP. Haeba u nchafatsa software ea Intel Quartus Prime, u tlameha ho nchafatsa IP.
- Y e bonts'a IP e kenyelletsa likarolo tse ncha. Nchafatsa IP ea hau ho kenyelletsa likarolo tsena tse ncha.
- Z e bonts'a IP e kenyelletsa liphetoho tse nyane. Hlahisa IP ea hau bocha ho kenyelletsa liphetoho tsena.
Lintlha Tse Amanang
- Lintlha tsa Phatlalatso ea Phatlalatso ea Intel Quartus Prime Design Suite
- Intel Agilex™ Embedded Memory User Guide
- Errata bakeng sa eSRAM Intel Agilex™ FPGA IP Sebakeng sa Tsebo
eSRAM Intel Agilex™ FPGA IP v20.1.0
Lethathamo la 1. v20.1.0 2022.09.26
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 22.3 | Ts'ehetso ea khokahano ea karolo ea Intel Agilex™ eSRAM IP ho sesebelisoa sa Moqapi oa Platform. | Ntlafatso ea IP ke boikhethelo ho Intel Quartus Prime Pro Edition software version 22.3.
|
eSRAM Intel Agilex FPGA IP v20.0.0
Lethathamo la 2. v20.0.0 2021.10.04
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 21.3 | E ntlafalitse liparamente tsa ch{0-7}_ecc_dec_eccmode le ch{0-7}_ecc_enc_eccmode ho ECC_DISABLED bakeng sa likou tse sa sebelisoeng. | Ntlafatso ea IP ea hlokahala ho fumana pokello ea phallo ea moralo le Intel Quartus Prime Pro Edition software version 21.3. |
Lethathamo la 3. v19.2.1 2021.06.29
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 21.2 | Lokisa tlolo ea molao ka ho eketsa (* altera_attribute = “-name HYPER_REGISTER_DELAY_CHAIN 100″*) ho eSRAM Intel Agilex FPGA IP. | Phetoho ke ea boikhethelo. U tlameha ho etsa ntlafatso ea IP haeba IP ea hau e sitoa ho finyella litekanyetso tse phahameng tsa ts'ebetso ka lebaka la tlōlo ea molao. |
eSRAM Intel Agilex FPGA IP v19.2.0
Lethathamo la 4. v19.2.0 2020.12.14
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 19.4 | E tlositse sebopeho se matla sa ECC le "decoder bypass" tšobotsi. | — |
eSRAM Intel Agilex FPGA IP v19.1.1
Lethathamo la 5. v19.1.1 2019.07.01
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 19.2 | Tokollo ea pele ea lisebelisoa tsa Intel Agilex. | — |
eSRAM Intel FPGA IP Release Notes (Intel Stratix® 10 Devices)
Haeba lengolo la tokollo le le sieo bakeng sa mofuta o itseng oa IP, IP ha e na liphetoho ho mofuta oo. Bakeng sa tlhaiso-leseling ka lintlafatso tsa IP ho fihla ho v18.1, sheba Lintlha tsa Phatlalatso tsa Intel Quartus Prime Design Suite.
Liphetolelo tsa Intel FPGA IP li tsamaisana le mefuta ea software ea Intel Quartus Prime Design Suite ho fihlela v19.1. Ho qala ka Intel Quartus Prime Design Suite software version 19.2, Intel FPGA IP e na le leano le lecha la phetolelo.
Nomoro ea Intel FPGA IP (XYZ) e ka fetoha ka mofuta o mong le o mong oa software ea Intel Quartus Prime. Phetoho ho:
- X e bontša phetoho e kholo ea IP. Haeba u nchafatsa software ea Intel Quartus Prime, u tlameha ho nchafatsa IP.
- Y e bonts'a IP e kenyelletsa likarolo tse ncha. Nchafatsa IP ea hau ho kenyelletsa likarolo tsena tse ncha.
- Z e bonts'a IP e kenyelletsa liphetoho tse nyane. Hlahisa IP ea hau bocha ho kenyelletsa liphetoho tsena.
Lintlha Tse Amanang
- Lintlha tsa Phatlalatso ea Phatlalatso ea Intel Quartus Prime Design Suite
- Intel Stratix® 10 Embedded Memory User Guide
- Errata bakeng sa eSRAM Intel FPGA IP sebakeng sa Tsebo
eSRAM Intel FPGA IP v19.2.0
Lethathamo la 6. v19.2.0 2022.09.26
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 22.3 | Ts'ehetso ea khokahano ea karolo ea sistimi ea Intel Stratix® 10 eSRAM IP ho sesebelisoa sa Moqapi oa Platform. | Ntlafatso ea IP ke boikhethelo ho Intel Quartus Prime Pro Edition software version 22.3.
|
eSRAM Intel FPGA IP v19.1.5
Lethathamo la 7. v19.1.5 2020.10.12
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 20.3 | E ntlafalitse tlhaloso ea Numella Mokhoa o Motla oa Matla ho eSRAM Intel FPGA IP parameter editor. | — |
eSRAM Intel FPGA IP v19.1.4
Lethathamo la 8. v19.1.4 2020.08.03
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 20.2 | E fetoletse lebitso la I/O PLL filelebitso ho tlosa molaetsa oa temoso ho tsoa ho IOPLL file.
Haeba li-eSRAM tse peli li na le liparamente tse tšoanang tsa PLL (maqhubu a oache ea referense ea PLL le maqhubu a oache a lakatsehang a PLL), molaetsa oa temoso o ka hlokomolohuoa. Haeba li-eSRAM tse peli li na le liparamente tse fapaneng tsa PLL, kamora ho bokelloa li tla hlophisoa ho maqhubu a tšoanang a PLL a nkiloeng ho e 'ngoe ea li-parameter tsa eSRAM Intel FPGA IP. Sheba ho Tlaleho ea Quartus Fitter ➤ Plan Stage ➤ Kakaretso ea Tšebeliso ea PLL ho shebella maqhubu a kentsoeng a eSRAM IOPLL. Ntlafatso ea IP ea hlokahala ha paramente ea PLL bakeng sa eSRAM ka bobeli e fapane. |
— |
eSRAM Intel FPGA IP v19.1.3
Lethathamo la 9. v19.1.3 2019.10.11
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 19.3 | E ntlafalitse tlhaloso ea PLL Reference Clock Frequency ho eSRAM Intel FPGA IP parameter editor. | — |
eSRAM Intel FPGA IP v18.1
Lethathamo la 10. v18.1 2018.10.03
| Intel Quartus Prime Version | Tlhaloso | Tšusumetso |
| 18.1 | E tlositse rejisetara ea HPI bakeng sa iopll_lock2core_reg. | U ka ntlafatsa IP ea hau ea mantlha. |
eSRAM Intel FPGA IP v18.0
Lethathamo la 11. v18.0 May 2018
| Tlhaloso | Tšusumetso |
| E rehiloe lebitso la Native eSRAM IP core ho eSRAM Intel FPGA IP joalo ka Intel rebranding. | — |
E kentse lets'oao le lecha la interface:
Boemo ba senotlolo sa eSRAM IOPLL. |
— |
Lintlha Tse Amanang
- Kenyelletso ea Intel FPGA IP Cores
- Intel Stratix 10 Embedded Memory User Guide
- Errata bakeng sa li-cores tse ling tsa IP ho Setsi sa Tsebo
Native eSRAM IP Core v17.1
Lethathamo la 12. v17.1 November 2017
| Tlhaloso | Tšusumetso |
| Tokollo ea pele. Setsi sena sa IP se fumaneha feela lisebelisoa tsa Intel Stratix 10. | — |
Lintlha Tse Amanang
- Kenyelletso ea Intel FPGA IP Cores
- Intel Stratix 10 Embedded Memory User Guide
- Errata bakeng sa li-cores tse ling tsa IP ho Setsi sa Tsebo
Intel Stratix 10 Embedded Memory User Guide Archives
Bakeng sa liphetolelo tsa morao-rao le tse fetileng tsa bukana ea mosebelisi, sheba ho Intel® Stratix® 10 Embedded Memory User Guide. Haeba IP kapa mofuta oa software o sa thathamisoa, ho sebetsa tataiso ea mosebelisi bakeng sa IP e fetileng kapa mofuta oa software.
Lintlha tsa Phallo ea eSRAM Intel® FPGA IP
Litokomane / Lisebelisoa
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Intel eSRAM Intel FPGA IP [pdf] Bukana ea Mosebelisi eSRAM Intel FPGA IP, Intel FPGA IP, FPGA IP, IP |
