Intel Molaetsa oa Phoso oa Ngoliso ea Molaetsa oa FPGA IP

Ngoliso ea Melaetsa ea Phoso ea Tataiso ea Mosebelisi ea Intel® FPGA IP Core

Molaetsa oa Liphoso oa Rejistara Intel® FPGA IP core (altera_emr_unloader) o bala le ho boloka lintlha tse tsoang ho potoloho e thata ea ho lemoha liphoso ho lisebelisoa tsa Intel FPGA tse tšehetsoeng. U ka sebelisa sebopeho sa logic sa Register Message Unloader IP core's Avalon® Streaming (Avalon-ST) ho bala sesebelisoa sa EMR.

Setšoantšo sa 1. Molaetsa oa Phoso oa Ngoliso ea Molaetsa oa Unloader Block Diagram

Ha hardware e nchafatsa litaba tsa EMR, IP core e bala (kapa e laolla) ebe e senya litaba tsa EMR, 'me e lumella mabaka a mang (joalo ka Intel FPGA Advanced SEU Detection IP core, Intel FPGA Fault Injection IP core, kapa logic ea mosebelisi) ho fihlella litaba tsa EMR ka nako e le 'ngoe.

Likaroloana

• E fumana le ho boloka litaba tsa molaetsa oa ngoliso ea liphoso bakeng sa lisebelisoa tsa Intel FPGA
• E lumella ente ea boleng ba litaba tsa ngoliso ea EMR ntle le ho fetola likotoana tsa CRAM
• Sehokelo sa Avalon (-ST).
• Kemiso e bonolo e nang le GUI ea mohlophisi oa paramente
• E hlahisa VHDL kapa Verilog HDL synthesis files

Tšehetso ea lisebelisoa tsa IP Core

Lisebelisoa tse latelang li tšehetsa konokono ea IP ea Ngoliso ea Molaetsa oa Phoso:

Letlapa la 1. Tšehetso ea lisebelisoa tsa IP Core

Software ea moralo	Tšehetso ea lisebelisoa tsa IP Core
Intel Quartus® Prime Pro Edition	Intel Arria® 10 le lisebelisoa tsa Intel Cyclone® 10 GX
Intel Quartus Prime Standard Edition	Arria V, Arria II GX/GZ, Intel Arria 10, Cyclone V, Stratix® IV, le lisebelisoa tsa Stratix V

Tšebeliso ea Mehloli le Ts'ebetso

Software ea Intel Quartus Prime e hlahisa khakanyo e latelang ea lisebelisoa bakeng sa sesebelisoa sa Cyclone V (5CGXFC7C7F23C8) FPGA. Liphetho tsa lisebelisoa tse ling tse tšehetsoeng lia tšoana.

Letlapa la 2. Ngoliso ea Molaetsa oa Phoso ea Unloader IP Core Device Resource Utilization

Sesebelisoa	Li-ALM	Lingoliloeng tsa logic		M20K
		Ea mantlha	Ea bobeli
5CGXFC7C7F23C8	37	128	33	0

Tlhaloso ea Ts'ebetso

Lisebelisoa tsa Intel FPGA tse tšehelitsoeng li na le rejisetara ea molaetsa oa phoso e bonts'ang ho hlaha ha phoso ea CRC ho RAM ea tlhophiso (CRAM). Liphoso tsa CRAM li ka etsahala ka lebaka la ketsahalo e le 'ngoe e ferekaneng (SEU). U ka sebelisa Sehokelo sa Melaetsa ea Phoso ea Unloader IP ea mantlha ea Avalon-ST ho fihlella sesebelisoa sa FPGA EMR. Bakeng sa mohlalaampLeha ho le joalo, u ka sebelisa "Phoso Message Register Unloader IP" ka Intel FPGA Fault Injection le Intel FPGA Advanced SEU Detection IP cores ho fihlella tlhahisoleseling ea EMR ea sesebelisoa. The Error Message Register Unloader IP core e lekola sesebelisoa EMR. Ha hardware e nchafatsa litaba tsa EMR, IP core e bala (kapa ea laolla) ebe e hlakola litaba tsa EMR. Moko oa IP o lumella mohopolo o mong (joalo ka Intel FPGA Advanced SEU Detection IP core, Intel FPGA Fault Injection IP core, kapa logic ea mosebelisi) ho fihlella litaba tsa EMR ka nako e le 'ngoe. Joalo ka ha ho bonts'itsoe ho #unique_1/unique_1_Connect_42_image_fbb_3mm_gs leqepheng la 3, Molaetsa oa Phoso oa Ngoliso ea Liphoso tsa IP o tiisa motheo oa CRC Verify IP bakeng sa lisebelisoa tse ling.
Tlhokomeliso: Bakeng sa tlhaiso-leseling e batsi mabapi le tšehetso ea SEU bakeng sa sesebelisoa sa hau sa FPGA, sheba khaolo ea phokotso ea SEU ea bukana ea sesebelisoa.

Ngoliso ea Melaetsa ea Phoso
Lisebelisoa tse ling tsa FPGA tsa ketsahalo e le 'ngoe (SEU) li na le potoloho ea ho lemoha liphoso e hahelletsoeng ho bona ho foqoha ha likotoana tsa CRAM tsa sesebelisoa ka lebaka la phoso e bonolo. Likabelo tse nyane tsa sesebelisoa sa EMR li fapana ho ea ka lelapa la sesebelisoa. Bakeng sa lintlha tse mabapi le likotoana tsa EMR bakeng sa lelapa la hau la sesebelisoa sa FPGA, sheba khaolo ea phokotso ea SEU ea bukana ea sesebelisoa.

Lipontšo

Letlapa la 3. Ngoliso ea Melaetsa ea Phoso Lipontšo tsa ho Laolla

Letshwao	Bophara	Tataiso	Tlhaloso
oache	1	Kenyeletso	Lets'oao la oache ea ho kenya.
tsosolosa	1	Kenyeletso	Letšoao la ho seta botjha la logic e sebetsang-hodimo.
emr_bala	1	Kenyeletso	Taba ea boikhethelo. Letšoao lena le sebetsang-holimo le qala ho bala hape litaba tsa hajoale tsa EMR. Litaba tsa EMR lia ntlafatsoa ha sesebelisoa se lemoha phoso e ncha. EMR e na le phoso ho fihlela phoso e ncha e fumanoa, leha ho hlatsuoa ka hare kapa kantle ho lokisa phoso.
cricerrror	1	Sephetho	E bontša ho fumana phoso ea CRC. Letšoao lena le hokahana le boema-kepe ba nako ea mantlha ea IP ea Register Message Unloader.
cricerror_pin	1	Sephetho	Hokela letšoao lena ho phini ea CRC_Error. Letšoao lena le lumellana le oscillator ea ka hare ea sesebelisoa.
cerrror_clk	1	Kenyeletso	Phoso ea CRC Netefatsa lets'oao la oache ea mantlha ea IP.
cerrror_reset	1	Kenyeletso	Phoso ea CRC Netefatsa lets'oao la ho seta botjha la IP e sebetsang-e phahameng.
emr[N-1:0]	46, 67, kapa 78	Sephetho	Boema-kepe bona ba data bo na le litaba tsa ngoliso ea molaetsa oa phoso, joalo ka ha ho hlalositsoe bukeng ea ho fokotsa lintlha tsa SEU: • Lisebelisoa tsa Intel Arria 10 le Intel Cyclone 10 GX li na le 78-bit EMRs • Lisebelisoa tsa Stratix V, Arria V, le Cyclone V li na le 67-bit EMRs • Lisebelisoa tsa khale li na le 46-bit EMRs Lipontšo tsa tlhahiso ea EMR li lumellana le tlhaloso ea sebopeho sa Avalon-ST. N ke 46, 67, kapa 78.
emr_valid	1	Sephetho	E sebetsa haholo ha dikahare tsa letshwao la emr di sebetsa. Letšoao lena le lumellana le tlhaloso ea sebopeho sa Avalon.
emr_error	1	Sephetho	Letšoao lena le sebetsa haholo ha tlhahiso ea hona joale ea EMR e na le phoso 'me e lokela ho hlokomolohuoa. Ka tloaelo, letšoao lena le bontša hore oache ea ho kenya EMR e butle haholo. Letšoao lena le lumellana le tlhaloso ea sebopeho sa Avalon.
endoffullchip	1	Sephetho	Letšoao la boikhethelo le bonts'ang pheletso ea potoloho e 'ngoe le e 'ngoe ea ho lemoha liphoso tsa chip bakeng sa sesebelisoa sohle. Intel Arria 10, Intel Cyclone 10 GX, Stratix V, Arria V, le lisebelisoa tsa Cyclone V feela.

Nako

Kokoana ea IP ea Ngoliso ea Molaetsa oa Phoso e hloka lipotoloho tse peli tsa lioache bakeng sa potoloho ea molaetsa oa phoso ea sesebelisoa, hammoho le lipotoloho tse ling tse latelang tsa Ngoliso ea Molaetsa oa Phoso Ho laolla litaba tsa EMR: N + 3 moo N e leng bophara ba lets'oao la emr.

• Lipotoloho tsa oache tse 122 bakeng sa lisebelisoa tsa Intel Arria 10 le Intel Cyclone 10 GX
• Lipotoloho tse 70 tsa lisebelisoa tsa Stratix V, Arria V, le Cyclone V
• Lipotoloho tsa oache tse 49 bakeng sa lisebelisoa tsa Stratix IV le Arria II GZ/GX

IP Timing Behaviour (Intel Arria 10 le Intel Cyclone 10 GX Devices)
Liphetoho tse latelang li bonts'a Boitšoaro ba Molaetsa oa Phoso ea Unloader IP ea mantlha bakeng sa lisebelisoa tsa Intel Arria 10 le Intel Cyclone 10 GX.

Setšoantšo sa 2. emr_valid Pontšo bakeng sa Liphoso Tse Lokisoang (0 < Mofuta o Thehiloeng ka Kholomo <3'b111) Setšoantšo sa Nako

Setšoantšo sa 3. emr_valid Pontšo bakeng sa Liphoso Tse Lokisoang ka mor'a ho Matlafatsa Feela (Mofuta o Thehiloeng Kholomong == 3'b0)
Tlhokomeliso: Ha e qala ho jarisoa ka bitstream, FPGA e sebelisa EDCRC e thehiloeng ho Frame hang, e lekanya cheke e thehiloeng ho likholomo ebe e e fetola EDCRC e thehiloeng ho kholumo. Setšoantšo sena sa nako se bua ka phoso e fumanoeng nakong ea EDCRC e thehiloeng ho foreimi.

Setšoantšo sa 4. emr_valid Signal bakeng sa Liphoso Tse sa Lokisoeng

Setšoantšo sa 5. emr_error Setšoantšo sa Nako

Linako Tsohle Tse Ling Tsa Lisebelisoa
Maqhubu a latelang a bonts'a Boitšoaro ba Molaetsa oa Phoso Unloader IP ea mantlha ea nako bakeng sa lisebelisoa tsa Stratix V, Stratix IV, Arria V, Arria II GZ/GX, le Cyclone V.

Setšoantšo sa 6. emr_bala Setšoantšo sa Nako

Setšoantšo sa 7. emr_valid Timeing Diagram

Setšoantšo sa 8. ExampSetšoantšo sa Nako ea Liphoso tsa EMR

• Tabeng ea liphoso tse 2 tse latellanang tsa SEU, IP core e tiisa emr_error bakeng sa litaba tsa EMR tse lahlehileng.
• IP core e tiisa emr_error haeba e bona moeli o oelang oa crcerror pulse bakeng sa phoso e latelang, pele IP core e jara litaba tse fetileng tsa rejista ea ntlafatso ea mosebelisi ea EMR ho ngoliso ea phetoho ea mosebelisi.
• Moeli o ntseng o phahama oa cricerror desserts emr_error.
• emr_error ke boemo bo mahlonoko ba tsamaiso 'me bo ka bontša hore oache ea ho kenya molaetsa oa Phoso ea Ngoliso ea Phoso e tsamaea butle haholo.

Litlhophiso tsa Parameter

Letlapa la 4. Li-Parameters tsa Molaetsa oa Phoso oa Li-unloader

Paramethara	Boleng	Ea kamehla	Tlhaloso
Karohano ea oache ea phoso ea CRC	1, 2, 4, 8, 16, 32, 64, 128, 256	2	E bonts'a boleng ba oache ea ho lemoha phoso e lokelang ho sebelisoa ho oscillator e ka hare. Oache e arohaneng e khanna mosebetsi oa ka hare oa CRC. Litlhophiso tsena li tlameha ho tšoana le tsa ERROR_CHECK_FREQUENCY_DIVISOR Intel Quartus Prime Settings File (.qsf) setting, ho seng joalo software e fana ka temoso. Lisebelisoa tsa Stratix IV le Arria II ha li tšehetse boleng ba 1.
Numella Virtual JTAG Ente ea phoso ea CRC	Bula, tima	E tima	E nolofalletsa mehloli ea li-in-system le probes (ISSP) ts'ebetso ea ho kenya litaba tsa ngoliso ea EMR ka J.TAG sehokelo ntle le ho fetola boleng ba CRAM. Sebelisa sebopeho sena ho rarolla mathata a mosebelisi a hokahaneng le mantlha.
Nako ea ho kenya oache	Leha e le efe	50 MHz	E hlalosa khafetsa oache ea konokono ea Ngoliso ea Melaetsa ea Phoso ea IP. Khetho ena e sebetsa ha e Oache ea ho kenya e tsamaisoa ho tloha ho Internal Oscillator parameter e tingoe.
Oache ea ho kenya e tsamaisoa ho tloha ho Internal Oscillator	Bula, tima	E tima	E bontša hore oscillator ea ka hare e fana ka oache ea mantlha ea ho kenya. Lumella paramethara ena haeba oscillator e ka hare e tsamaisa oache ea mantlha ea moralo oa mosebelisi. Hlokomela: Khafetsa ea oscillator ea ka hare ha e amehe ke mohlophisi oa oache ea phoso ea CRC.
Phoso ea CRC Netefatsa nako ea ho kenya oache	10 - 50 MHz	50 MHz	E Hlalosa Phoso ea CRC Netefatsa IP core (ALTERA_CRCERROR_VERIFY) maqhubu a oache ea ho kenya. Lisebelisoa tsa Stratix IV le Arria II feela.
Ho phethela potoloho e felletseng ea Phoso ea chip	Bula, tima	E tima	Taba ea boikhethelo. Bulela ho tiisa letšoao lena qetellong ea nako e 'ngoe le e 'ngoe ea ho lemoha liphoso tsa chip. Stratix V, Intel Arria 10, Arria V, Cyclone V, le lisebelisoa tsa Intel Cyclone 10 GX feela.

Ho kenya le ho fana ka laesense ea Intel FPGA IP Cores

Sesebelisoa sa Intel Quartus Prime software se kenyelletsa laeborari ea Intel FPGA IP. Laeborari ena e fana ka li-cores tse ngata tsa bohlokoa tsa IP bakeng sa tšebeliso ea hau ea tlhahiso ntle le tlhoko ea laesense e eketsehileng. Li-cores tse ling tsa Intel FPGA IP li hloka ho rekoa laesense e arohaneng bakeng sa ts'ebeliso ea tlhahiso. Intel FPGA IP Evaluation Mode e u lumella ho lekola li-cores tsena tse ngolisitsoeng ka molao tsa Intel FPGA ka papiso le hardware, pele u etsa qeto ea ho reka laesense e felletseng ea tlhahiso ea IP. U hloka feela ho reka laesense e felletseng ea tlhahiso bakeng sa li-cores tsa Intel IP tse ngolisitsoeng ka molao ka mor'a hore u qete tlhahlobo ea hardware 'me u se u loketse ho sebelisa IP tlhahiso. Software ea Intel Quartus Prime e kenya li-cores tsa IP libakeng tse latelang ka boiketsetso:

Setšoantšo sa 9. IP Core Installation Path

Letlapa la 5. Libaka tsa ho kenya IP Core

Sebaka	Software	Sethala
:\intelFPGA_pro\quartus\ip\altera	Khatiso ea Intel Quartus Prime Pro	Lifensetere *
:\intelFPGA\quartus\ip\altera	Intel Quartus Prime Standard Edition	Windows
:/intelFPGA_pro/quartus/ip/altera	Khatiso ea Intel Quartus Prime Pro	Linux *
:/intelFPGA/quartus/ip/altera	Intel Quartus Prime Standard Edition	Linux

Ho Itloaetsa le ho Hlahisa IP Cores
U ka etsa li-cores tsa IP ho ts'ehetsa mefuta e mengata e fapaneng ea lits'ebetso. Intel Quartus Prime IP Catalogue le mohlophisi oa parameter li u lumella ho khetha kapele le ho hlophisa likou tsa mantlha tsa IP, likarolo le tlhahiso. files.

IP Catalog le Parameter Editor
IP Catalog e bonts'a li-cores tsa IP tse fumanehang bakeng sa projeke ea hau, ho kenyeletsoa Intel FPGA IP le IP e 'ngoe eo u e kenyang tseleng ea ho batla ea IP Catalog. Sebelisa lintlha tse latelang tsa IP Catalog ho fumana le ho etsa IP core:

• Sefa Catalog ea IP ho Bontša IP bakeng sa lelapa la lisebelisoa tse sebetsang kapa Bontša IP bakeng sa malapa ohle a lisebelisoa. Haeba ha u na projeke e butsoeng, khetha Lelapa la Sesebelisoa ho IP Catalog.
• Ngola sebakeng sa Batla ho fumana lebitso lefe kapa lefe le felletseng kapa le sa fellang la IP ho IP Catalog.
• Tobetsa ka ho le letona lebitso la mantlha la IP ho IP Catalog ho bonts'a lintlha tse mabapi le lisebelisoa tse tšehetsoeng, ho bula foldara ea ho kenya ea mantlha ea IP, le lihokelo tsa litokomane tsa IP.
• Tobetsa Batla IP ea molekane ho fihlella tlhahisoleseling ea molekane oa IP ho web.

Mohlophisi oa paramethara o u khothaletsa hore u hlalose lebitso la phapano ea IP, likou tsa boikhethelo, le tlhahiso file likhetho tsa moloko. Mohlophisi oa paramethara o hlahisa Intel Quartus Prime IP ea boemo bo holimo file (.ip) bakeng sa phapano ea IP mererong ea Intel Quartus Prime Pro Edition. Mohlophisi oa parameter o hlahisa Quartus IP ea boemo bo holimo file (.qip) bakeng sa phapano ea IP ho merero ea Intel Quartus Prime Standard Edition. Tsena files emela phapang ea IP morerong, 'me u boloke lintlha tsa parameterization.

Setšoantšo sa 10. IP Parameter Editor (Intel Quartus Prime Pro Edition)

Setšoantšo sa 11. IP Parameter Editor (Intel Quartus Prime Standard Edition)

Mohlophisi oa Parameter
Mohlophisi oa paramethara o u thusa ho hlophisa likou tsa mantlha tsa IP, liparamente le tlhahiso file likhetho tsa moloko. Litaolo tsa mantlha tsa parameter li kenyelletsa tse latelang:

• Sebelisa fensetere ea Presets ho sebelisa litekanyetso tsa paramethara tse seng li setiloe bakeng sa lits'ebetso tse ikhethileng (bakeng sa li-cores tse khethiloeng).
• Sebelisa fensetere ea Lintlha ho view litlhaloso tsa port le parameter, 'me u tobetse lihokelo tsa litokomane.
• Tobetsa Hlahisa ➤ Hlahisa Sisteme ea Testbench ho hlahisa sistimi ea testbench (bakeng sa li-cores tse khethiloeng).
• Tobetsa Hlahisa ➤ Hlahisa Example Design ho hlahisa example moralo (bakeng sa li-cores tse khethiloeng).
• Tobetsa Netefatsa Botšepehi ba Sisteme ho netefatsa likarolo tse akaretsang tsa sistimi khahlano le molekane files. (Litsamaiso tsa Moqapi oa Platform feela)
• Tobetsa Sync All System Info ho netefatsa likarolo tse akaretsang tsa sistimi khahlano le molekane files. (Litsamaiso tsa Moqapi oa Platform feela)

IP Catalog e fumaneha hape ho Moqapi oa Platform (View ➤ IP Catalog). The Platform Designer IP Catalog e kenyelletsa khokahano e ikhethileng ea sistimi, ts'ebetso ea video le litšoantšo, le IP e meng ea boemo ba sistimi e sa fumaneheng ho Intel Quartus Prime IP Catalog. Sheba ho Theha Sisteme e nang le Moqapi oa Platform kapa ho Theha Sistimi e nang le Moqapi oa Platform (E Tloaelehileng) bakeng sa tlhahisoleseling mabapi le ts'ebeliso ea IP ho Moqapi oa Platform (E Tloaelehileng) le Moqapi oa Platform, ka ho latellana.

Lintlha Tse Amanang

• Ho theha Sisteme e nang le Moqapi oa Platform
• Ho theha Sisteme e nang le Moqapi oa Platform (E Tloaelehileng) (E Tloaelehileng)

Ho hlalosa IP Core Parameters le Options
Latela mehato ena ho hlakisa liparamente tsa mantlha tsa IP le likhetho.

1. Lenaneng la IP la Moqapi oa Platform (Lisebelisoa ➤ IP Catalogue), fumana le ho penya habeli lebitso la mantlha la IP ho ikhethela. Mohlophisi oa parameter oa hlaha.
2. Hlalosa lebitso la boemo bo holimo bakeng sa IP ea hau ea tloaelo. Lebitso lena le supa phapang ea mantlha ea IP files morerong oa hau. Haeba u khothaletsoa, ​​boela u hlalose hore na lelapa la sesebelisoa sa FPGA ke sefe le tlhahiso file Khetho ea HDL. Tobetsa OK.
3. Hlalosa litlhophiso le likhetho bakeng sa phapano ea hau ea IP:
   • Ka boikhethelo, khetha litekanyetso tsa parametha e seng e setiloe. Li-presets li totobatsa boleng bohle ba paramethara bakeng sa lits'ebetso tse ikhethileng (moo li fanoeng).
   • Hlalosa litlhophiso tse hlalosang ts'ebetso ea mantlha ea IP, tlhophiso ea boema-kepe, le likarolo tse ikhethileng tsa sesebelisoa.
   • Hlalosa likhetho bakeng sa ho hlahisa lenane la nako, mohlala oa papiso, testbench, kapa mohlalaample moralo (moo ho hlokahalang).
   • Hlalosa likhetho tsa ho sebetsana le IP core files lisebelisoa tse ling tsa EDA.
4. Tobetsa Qetella ho hlahisa motsoako le tse ling tsa boikhethelo files e tsamaellanang le lintlha tsa IP tsa hau tse fapaneng. Mohlophisi oa paramethara o hlahisa phetoho ea boemo bo holimo ea .qsys IP file le HDL files bakeng sa ho kopanya le ketsiso. Li-cores tse ling tsa IP le tsona ka nako e le 'ngoe li hlahisa testbench kapa example moralo bakeng sa tlhahlobo ea lisebelisoa.
5. Ho hlahisa testbench ea ketsiso, tobetsa Hlahisa ➤ Hlahisa Testbench System. Hlahisa Testbench System ha e fumanehe bakeng sa li-cores tse ling tsa IP tse sa faneng ka teko ea ho etsisa.
6. Ho hlahisa ex ea boemo bo holimo HDLample bakeng sa netefatso ea hardware, tobetsa Hlahisa ➤ HDL Example. Hlahisa ➤ HDL ExampLe ha e fumanehe bakeng sa li-cores tse ling tsa IP.

Phapang ea boemo bo holimo ea IP e eketsoa morerong oa hajoale oa Intel Quartus Prime. Tobetsa Morero ➤ Eketsa/Tlosa Files ho Project ho kenya .qsys (Intel Quartus Prime Standard Edition) kapa .ip (Intel Quartus Prime Pro Edition) file ho morero. Etsa likabelo tse nepahetseng tsa phini ho hokahanya likou.

Core Generation Output (Khatiso ea Intel Quartus Prime Pro)
Software ea Intel Quartus Prime e hlahisa tlhahiso e latelang file sebopeho sa li-cores tsa IP tseo e seng karolo ea sistimi ea Moqapi oa Platform.

Setšoantšo sa 12. Motho ka mong IP Core Generation Output (Intel Quartus Prime Pro Edition)

Lethathamo la 6. Sephetho Files ea Intel FPGA IP Generation

File Lebitso	Tlhaloso
<hao_ip>.ip	Phapang ea maemo a holimo a IP file e nang le parameterization ea mantlha ea IP morerong oa hau. Haeba phapang ea IP e le karolo ea sistimi ea Moqapi oa Platform, paramethara e boetse e hlahisa .qsys file.
<hao_ip>.cmp	Phatlalatso ea Karolo ea VHDL (.cmp) file ke mongolo file e nang le litlhaloso tsa lehae tsa generic le port tseo o li sebelisang moetsong oa VHDL files.
<hao_ip>_moloko.rpt	Lenane la tlhahiso ea IP kapa Platform Designer file. E bonts'a kakaretso ea melaetsa nakong ea tlhahiso ea IP.
e tsoela pele…

File Lebitso	Tlhaloso
<hao_ip>.qgsimc (Mesebetsi ea Moqapi oa Platform feela)	Ketsiso caching file seo se bapisa .qsys le .ip files ka parameterization ea hajoale ea Sistimi ea Moqapi oa Platform le IP core. Papiso ena e etsa qeto ea hore na Moqapi oa Platform a ka tlola ho nchafatsoa ha HDL.
<hao_ip>.qgsynth (Mesebetsi ea Moqapi oa Platform feela)	Synthesis caching file seo se bapisa .qsys le .ip files ka parameterization ea hajoale ea Sistimi ea Moqapi oa Platform le IP core. Papiso ena e etsa qeto ea hore na Moqapi oa Platform a ka tlola ho nchafatsoa ha HDL.
<hao_ip>.qip	E na le lintlha tsohle tsa ho kopanya le ho bokella karolo ea IP.
<hao_ip>.csv	E na le leseli mabapi le boemo ba ntlafatso ea karolo ea IP.
.bsf	Setšoantšo sa pontšo ea phapang ea IP bakeng sa ho sebelisoa ho Block Diagram Files (.bdf).
<hao_ip>.spd	Kenyeletso file hore ip-make-simscript e hloka ho hlahisa mongolo oa papiso. The .spd file e na le lenane la files o hlahisa bakeng sa papiso, mmoho le tlhahisoleseling mabapi le mehopolo eo u e qalang.
<hao_ip>.ppf	The Pin Planner File (.ppf) e boloka likabelo tsa kou le li-node bakeng sa likarolo tsa IP tseo u li etsang hore li sebelisoe le Pin Planner.
<hao_ip>_bb.v	Sebelisa lebokose le letšo la Verilog (_bb.v) file joalo ka phatlalatso ea mojule e se nang letho bakeng sa ho sebelisoa joalo ka lebokose le letšo.
<hao_ip>_inst.v kapa _inst.vhd	HDL mohlalaample instantiation template. Kopitsa le ho manamisa litaba tsa sena file ho HDL ea hau file ho kenya letsoho ho feto-fetoha ha IP.
<hao_ip>.regmap	Haeba IP e na le tlhahisoleseling, Intel Quartus Prime software e hlahisa .regmap file. The .regmap file e hlalosa tlhaiso-leseling ea 'mapa oa master le makhoba interfaces. Sena file tlatsetso the .sopcinfo file ka ho fana ka tlhaiso-leseling e batsi mabapi le sistimi. Sena file e nolofalletsa ponts'o ea ngoliso views le lipalo-palo tseo motho a ka li khethang ho System Console.
<hao_ip>.svd	E lumella lisebelisoa tsa HPS System Debug ho view limmapa tsa ngoliso ea li-peripheral tse hokelang ho HPS ka har'a sistimi ea Moqapi oa Platform. Nakong ea ho kopanya, software ea Intel Quartus Prime e boloka .svd files bakeng sa segokanyimmediamentsi sa sebolokigolo se bonahalang ho beng ba System Console ho .sof file nakong ea ho lokisa bothata. System Console e bala karolo ena, eo Moqapi oa Platform a e botsang bakeng sa tlhaiso-leseling ea limmapa. Bakeng sa makhoba a tsamaiso, Moqapi oa Platform o fihlella li-registas ka mabitso.
<hao_ip>.vhao_ip>.vhd	HDL files tse tiisang submodule e 'ngoe le e 'ngoe kapa konokono ea IP ea bana bakeng sa ho kopanya kapa ho etsisa.
moeletsi/	E na le msim_setup.tcl script ho seta le ho etsa ketsiso.
aldec/	E na le script rivierapro_setup.tcl ho seta le ho etsa ketsiso.
/synopsy/vcs /synopsys/vcsmx	E na le shell script vcs_setup.sh ho seta le ho etsa papiso. E na le mongolo oa khetla vcsmx_setup.sh le synopsys_sim.setup file ho theha le ho tsamaisa ketsiso.
/cadence	E na le mongolo oa khetla ncsim_setup.sh le litlhophiso tse ling files ho theha le ho tsamaisa ketsiso.
/xcelium	E na le sengoloa sa khetla sa Parallel simulator xcelium_setup.sh le litlhophiso tse ling files ho theha le ho tsamaisa ketsiso.
/submodule	E na le HDL files bakeng sa submodule ea mantlha ea IP.
<IP submodule>/	Moqapi oa Platform o hlahisa / synth le / sim sub-directory bakeng sa bukana e 'ngoe le e' ngoe ea submodule ea IP eo Moqapi oa Platform a e hlahisang.

Ho hlalosa IP Core Parameters le Options (Legacy Parameter Editors)

Li-cores tse ling tsa IP li sebelisa mofuta oa lefa oa mohlophisi oa paramethara bakeng sa tlhophiso le tlhahiso. Sebelisa mehato e latelang ho lokisa le ho hlahisa phapano ea IP u sebelisa mohlophisi oa parameter ea lefa.
Hlokomela: Mohlophisi oa parameter ea lefa o hlahisa tlhahiso e fapaneng file sebopeho ho feta paramethara ea morao-rao. Sheba ho Hlalosa IP Core Parameters le Options bakeng sa tlhophiso ea li-cores tsa IP tse sebelisang mohlophisi oa morao-rao oa parameter.

Setšoantšo sa 13. Bahlophisi ba Parameter ea Lefa

1. Ho IP Catalog (Lisebelisoa ➤ IP Catalogue), fumana le ho penya habeli lebitso la mantlha la IP ho ikhethela. Mohlophisi oa parameter oa hlaha.
2. Hlalosa lebitso la boemo bo holimo le tlhahiso ea HDL file thaepa bakeng sa phapano ea hau ea IP. Lebitso lena le supa phapang ea mantlha ea IP files morerong oa hau. Tobetsa OK.
3. Hlalosa litlhophiso le likhetho bakeng sa phapano ea hau ea IP ho sehlophisi sa paramethara. Sheba tataiso ea hau ea mosebelisi ea IP bakeng sa tlhaiso-leseling e mabapi le liparamente tse itseng tsa mantlha tsa IP.
4. Tobetsa Qetella kapa Hlahisa (ho latela mofuta oa mohlophisi oa parameter). Mohlophisi oa parameter o etsa faele ea files bakeng sa phapang ea hau ea IP ho latela litlhaloso tsa hau. Tobetsa Tsoa haeba u botsoa ha tlhahiso e felile. Mohlophisi oa parameter o eketsa boemo bo holimo .qip file ho morero oa hajoale ka bo eona.

Hlokomela: Ho kenya ka bowena phapano ea IP e hlahisitsoeng ka mohlophisi oa paramethara ea lefa ho projeke, tobetsa Morero ➤ Eketsa/Tlosa Files ho Project mme o kenye phapang ea IP .qip file.

IP Core Generation Output (Intel Quartus Prime Standard Edition)
Software ea Intel Quartus Prime Standard Edition e hlahisa e 'ngoe ea tse latelang file meaho ea li-cores tsa IP tse sebelisang e 'ngoe ea bahlophisi ba paramethara ea lefa.

Setšoantšo sa 14. IP Core E hlahisitsoe Files (Bahlophisi ba Parametha ea Lefa)

IP e hlahisitsoeng File Sephetho A

IP e hlahisitsoeng File Sephetho B

IP e hlahisitsoeng File Sephetho C

IP e hlahisitsoeng File Sephetho sa D

Lintlha:

1. Haeba e tšehelitsoe ebile e nolofalitsoe bakeng sa phapano ea hau ea IP
2. Haeba mehlala e sebetsang ea ho etsisa e hlahisoa
3. Hlokomoloha lethathamo lena

Nalane ea Phetoho ea Litokomane bakeng sa Ngoliso ea Molaetsa oa Phoso ea Tlamolla Intel FPGA IP IP Core User Guide

Tokomane Version	Intel Quartus Prime Version	Liphetoho
2018.05.23	18.0	• Ho reha IP bocha ho tsoa Intel FPGA Molaetsa oa Phoso ea Ngoliso ea Molaetsa oa IP ea mantlha ho Ngoliso ea Molaetsa oa Phoso ea Unloader Intel FPGA IP core. • Lipalo tse nchafalitsoeng emr_valid Pontšo bakeng sa Liphoso Tse Lokeloang Ka mor'a ho Matlafatsa Feela (Mofuta o Thehiloeng Kholomong == 3'b0) le emr_valid Signal bakeng sa Liphoso Tse sa Lokisoeng.

Letsatsi	Phetolelo	Liphetoho
Tšitoe 2017	2017.12.18	• Ho reha tokomane bocha joalo ka Ngoliso ea Molaetsa oa Phoso ea Intel FPGA ea Molaetsa oa Tataiso ea Mosebelisi oa IP Core. • Ntlafatsa tafole ea "IP Core Device Support". • E ntlafalitsoe bakeng sa maemo a morao-rao a marang-rang. • E entse lintlafatso tsa bohlophisi ho pholletsa le tokomane.
Phupu 2017	2017.07.15	• Tšehetso ea lisebelisoa tsa Intel Cyclone 10 GX e ekelitsoeng. • Fetotse V-Type ho ea ho Mofuta o Thehiloeng ho Kholomo ho litšoantšo tsa nako tsa IP. • E fane ka litaelo tse arohaneng tsa parameterization bakeng sa Khatiso ea Intel Quartus Prime Pro le Intel Quartus Prime Standard Edition. • E ntlafalitsoe bakeng sa maemo a morao-rao a marang-rang.
Motšeanong 2016	2016.05.02	• Tlosa tšobotsi bullet mabapi Verilog HDL RTL tšehetso. • Ho fetotsoe litšupiso tsa Quartus II ho Quartus Prime.
Phuptjane 2015	2015.06.12	Lintlha tse ntlafalitsoeng tsa tšehetso ea Arria 10.
Tšitoe 2014	2014.12.15	Tokollo ea pele.

Intel Corporation. Litokelo tsohle li sirelelitsoe. Intel, logo ea Intel, le matšoao a mang a Intel ke matšoao a khoebo a Intel Corporation kapa lithuso tsa eona. Intel e tiisa ts'ebetso ea FPGA ea eona le lihlahisoa tsa semiconductor ho latela litlhaloso tsa hajoale ho latela waranti e tloaelehileng ea Intel, empa e na le tokelo ea ho etsa liphetoho ho lihlahisoa le lits'ebeletso life kapa life ka nako efe kapa efe ntle le tsebiso. Intel ha e nke boikarabello kapa boikarabello bo hlahang ka lebaka la kopo kapa ts'ebeliso ea tlhahisoleseling efe kapa efe, sehlahisoa, kapa ts'ebeletso e hlalositsoeng mona ntle le ha ho lumellane ka ho hlaka ka lengolo ke Intel. Bareki ba Intel ba eletsoa ho fumana mofuta oa morao-rao oa litlhaloso tsa sesebelisoa pele ba itšetleha ka tlhahisoleseling efe kapa efe e phatlalalitsoeng le pele ba kenya liodara tsa lihlahisoa kapa lits'ebeletso. *Mabitso a mang le mabitso a mang a ka nkoa e le thepa ea ba bang.

Litokomane / Lisebelisoa

Intel Molaetsa oa Phoso oa Ngoliso ea Molaetsa oa FPGA IP Core [pdf] Bukana ea Mosebelisi Ngoliso ea Melaetsa ea Phoso FPGA IP Core, Phoso, Ngoliso ea Molaetsa ea Laollang FPGA IP Core, Ngolisa se Taolong FPGA IP Core, Se laollang FPGA IP Core

Litšupiso

• Bukana ea Mosebelisi