Ithute ka ASMI Parallel II Intel FPGA IP, IP core e tsoetseng pele e nolofalletsang phihlello ea flash e otlolohileng le ngoliso ea taolo bakeng sa lits'ebetso tse ling. Bukana ena ea mosebedisi e akaretsa malapa ohle a lisebelisoa tsa Intel FPGA 'me e tšehetsoa ho Quartus Prime software version 17.0 le ho ea pele. Fumana lintlha tse ling mabapi le sesebelisoa sena se matla sa liapdeite tsa sistimi e hole le polokelo ea SEU Sensitivity Map Header Files.
Ithute mokhoa oa ho etsa paramethara le ho etsa hore Intel Cyclone 10 GX Native Floating-Point DSP FPGA IP ea mantlha e be ea hau ka thuso ea bukana ea mosebelisi. Tataiso ena e fana ka litaelo tsa mohato ka mohato le lethathamo la liparamente tseo u ka khethang ho tsona, ho kenyeletsoa Angata Add, Vector Mode 1, le tse ling. E shebile sesebelisoa sa Intel Cyclone 10 GX, tataiso e kenyelletsa mohlophisi oa paramethara ea IP ho theha motheo oa IP o hlophisitsoeng o loketseng moralo ofe kapa ofe. Qala kajeno ka bukana ena e felletseng ea basebelisi.
Tataiso ena ea mosebelisi e fana ka lintlha tse felletseng mabapi le Fronthaul Compression FPGA IP, mofuta 1.0.1, e etselitsoeng Intel® Quartus® Prime Design Suite 21.4. IP e fana ka compression le decompression bakeng sa data ea U-plane IQ, ka tšehetso bakeng sa µ-law kapa block floating-point compression. E boetse e kenyelletsa likhetho tse tsitsitseng le tse matla tsa sebopeho sa IQ le sehlooho sa compression. Tataiso ena ke sesebelisoa sa bohlokoa ho mang kapa mang ea sebelisang FPGA IP ena bakeng sa meralo ea sistimi le lithuto tsa tšebeliso ea lisebelisoa, papiso, le tse ling.
