Intel OPAE FPGA Linux Device Driver Architecture

OPAE Intel FPGA Linux Device Driver Architecture

Mokhanni oa OPAE Intel FPGA o fana ka li-interfaces bakeng sa lits'ebetso tsa sebaka sa basebelisi ho hlophisa, ho bala, ho bula, le ho fihlella li-accelerator tsa FPGA sethaleng se nang le litharollo tsa Intel FPGA 'me se nolofalletsa mesebetsi ea tsamaiso ea tsamaiso e kang FPGA reconfiguration, tsamaiso ea matla, le virtualization.

Hardware Architecture

Ho tloha ntlha ea OS ea view, hardware ea FPGA e hlaha e le sesebelisoa se tloaelehileng sa PCIe. Memori ea sesebelisoa sa FPGA e hlophisitsoe ho sebelisoa sebopeho sa data se boletsoeng esale pele (Lethathamo la Lisebelisoa tsa Sesebelisoa). Likarolo tse tšehelitsoeng ke sesebelisoa sa FPGA li pepesoa ka libopeho tsena tsa data, joalo ka ha ho bonts'itsoe ka tlase setšoantšong se latelang:

Sesebelisoa sa FPGA PCIe

Mokhanni o tšehetsa PCIe SR-IOV ho theha Virtual Functions (VFs) e ka sebelisoang ho abela li-accelerator ka bomong mechineng ea sebele.

Intel Corporation. Litokelo tsohle li sirelelitsoe. Intel, logo ea Intel, le matšoao a mang a Intel ke matšoao a khoebo a Intel Corporation kapa lithuso tsa eona. Intel e tiisa ts'ebetso ea FPGA ea eona le lihlahisoa tsa semiconductor ho latela litlhaloso tsa hajoale ho latela waranti e tloaelehileng ea Intel empa e na le tokelo ea ho etsa liphetoho ho lihlahisoa le lits'ebeletso life kapa life ka nako efe kapa efe ntle le tsebiso. Intel ha e nke boikarabello kapa boikarabello bo hlahang ka lebaka la kopo kapa ts'ebeliso ea tlhahisoleseling efe kapa efe, sehlahisoa, kapa ts'ebeletso e hlalositsoeng mona ntle le ha ho lumellane ka ho hlaka ka lengolo ke Intel. Bareki ba Intel ba eletsoa ho fumana mofuta oa morao-rao oa litlhaloso tsa sesebelisoa pele ba itšetleha ka tlhahisoleseling efe kapa efe e phatlalalitsoeng le pele ba kenya liodara tsa lihlahisoa kapa lits'ebeletso.

Mabitso a mang le mabitso a mang a ka nkoa e le thepa ea ba bang.

Sesebelisoa sa Virtualized FPGA PCIe

FPGA Management Engine (FME)
Enjene ea Tsamaiso ea FPGA e sebetsa matla le taolo ea mocheso, ho tlaleha liphoso, ho hlophisa bocha, tlaleho ea ts'ebetso, le mesebetsi e meng ea litšebeletso tsa motheo. FPGA e 'ngoe le e' ngoe e na le FME e le 'ngoe, eo kamehla e fumanehang ka Physical Function (PF). Lisebelisoa tsa sebaka sa mosebelisi li ka fumana phihlello e ikhethileng ho FME li sebelisa open(), ebe li e lokolla li sebelisa close() joalo ka mosebelisi ea lehlohonolo (motso).

Boema-kepe
Boema-kepe bo emela khokahano lipakeng tsa lesela le sa fetoheng la FPGA ("FPGA Interface Manager (FIM)") le sebaka se ka lokisoang bocha se nang le Accelerator Function (AF). Boema-kepe bo laola puisano ho tloha ho software ho ea ho accelerator mme e pepesa likarolo tse kang reset le debug. Sesebelisoa sa PCIe se kanna sa ba le likou tse 'maloa,' me Boema-kepe bo bong le bo bong bo ka pepesoa ka VF ka ho bo abela ho sebelisoa FPGA_FME_PORT_ASSIGN ioctl sesebelisoa sa FME.

Setsi sa Mosebetsi oa Accelerator (AF).

• Yuniti ea Accelerator Function (AF) e hokeletsoe Boema-kepeng 'me e pepesa sebaka sa 256K MMIO se tla sebelisoa bakeng sa lirejistara tsa taolo e ikhethileng ea accelerator.
• Lisebelisoa tsa sebaka sa mosebelisi li ka fumana phihlello e ikhethileng ea AFU e hokelletsoeng Koung ka ho sebelisa open() sesebelisoa sa Port, ebe se e lokolla ka close().
• Lisebelisoa tsa sebaka sa mosebelisi le tsona li ka etsa mmap() accelerator libaka tsa MMIO.

Phetoho e sa Feleng
Joalokaha ho boletsoe ka holimo, li-accelerator li ka hlophisoa bocha ka ho hlophisoa bocha ha Mosebetsi oa Accelerator (AF) file. Mosebetsi oa Accelerator (AF) o tlameha ebe o hlahisitsoe bakeng sa FIM e nepahetseng le sebaka se lebisitsoeng sa static (Port) sa FPGA; ho seng joalo, ts'ebetso ea ho tsosolosa e tla hlōleha 'me mohlomong e baka ho se tsitse ha tsamaiso. Tšebelisano ena e ka hlahlojoa ka ho bapisa ID ea interface e boletsoeng sehloohong sa AF khahlano le ID ea interface e pepesitsoeng ke FME ka li-sysfs. Cheko ena hangata e etsoa ke sebaka sa mosebelisi pele o letsetsa IOCTL ea tlhophiso.

Hlokomela:
Hajoale, lenaneo lefe kapa lefe la software le fihlellang FPGA, ho kenyeletsoa le tse sebetsang ka har'a moamoheli o hlophisitsoeng, li tlameha ho koaloa pele ho leka ho nchafatsa mokhoa o itseng. Mehato e tla ba:

1. Theola mokhanni ho moeti
2. Tlosa VF ho moeti
3. Tlosa SR-IOV
4. Etsa phetolo bocha
5. Numella SR-IOV
6. Hokela VF ho moeti
7. Laela mokhanni moeti

FPGA Virtualization
Ho nolofalletsa ho fihlella accelerator ho tsoa lits'ebetsong tse sebetsang ka VM, boema-kepe ba AFU bo lokelang ho abeloa VF ho sebelisa mehato e latelang:

1. PF e na le likou tsohle tsa AFU ka boiketsetso. Boema-kepe bofe kapa bofe bo hlokang ho abeloa VF bo tlameha ho lokolloa pele ho PF ka FPGA_FME_PORT_RELEASE ioctl ho sesebelisoa sa FME.
2. Hang ha li-port tsa N li lokolloa ho PF, taelo e ka tlase e ka sebelisoa ho nolofalletsa SRIOV le VFs. VF ka 'ngoe e na le kou e le 'ngoe feela e nang le AFU. echo N > PCI_DEVICE_PATH/sriov_nuMVfs
3. Feta li-VF ho ea ho li-VM.
4. AFU tlasa VF e fumaneha ho tsoa lits'ebetsong tsa VM (ho sebelisa mokhanni a le mong kahare ho VF).

Hlokomela:
FME e ke ke ea abeloa VF, kahoo PR le mesebetsi e meng ea tsamaiso li fumaneha feela ka PF.

Mokhatlo oa Bakhanni

Mokhanni oa Sesebelisoa sa PCIe Module

Mokhatlo oa Bakhanni

Lisebelisoa tsa FPGA li hlaha e le lisebelisoa tse tloaelehileng tsa PCIe; ka hona, mokhanni oa sesebelisoa sa FPGA PCIe (intel-FPGA-PCI.ko) o lula a laeloa pele hang ha FPGA PCIe PF kapa VF e fumanoa. Mokhanni enoa o bapala karolo ea motheo mohahong oa mokhanni. Eona:

• E theha sesebelisoa sa setshelo sa FPGA joalo ka motsoali oa lisebelisoa tsa eona.
• E tsamaea ka har'a Lethathamo la Lisebelisoa, le kentsoeng mohopolong oa PCIe sesebelisoa sa BAR, ho fumana lisebelisoa le likarolo tsa tsona tse nyane le ho li etsetsa lisebelisoa tsa sethala tlasa sesebelisoa sa setshelo.
• E tšehetsa SR-IOV.
• E hlahisa karolo ea lisebelisoa tsa motheo, tse fokotsang ts'ebetso bakeng sa likaroloana le ho hlahisa mesebetsi e tloaelehileng ho kenya likhanni tsa lisebelisoa.

Mesebetsi ea Mokhanni oa Sesebelisoa sa PCIe Module

• E na le tšibollo ea PCIe, lenane la lisebelisoa, le ho sibolloa ha likarolo.
• E theha li-directory tsa sysfs bakeng sa sesebelisoa sa motsoali, FPGA Management Engine (FME), le Port.
• E theha maemo a mokhanni oa sethala, e leng se etsang hore Linux kernel e laole bakhanni ba bona ba li-module tsa sethala.

FME Platform Module Device Driver

• Taolo ea matla le mocheso, tlaleho ea liphoso, tlaleho ea ts'ebetso, le mesebetsi e meng ea litšebeletso tsa motheo. O ka fihlella lits'ebetso tsena ka li-interface tsa sysfs tse pepesitsoeng ke mokhanni oa FME.
• Phetoho e sa Feleng. Mokhanni oa FME o ngolisa Mookameli oa FPGA nakong ea ho qalisoa ha karolo e nyenyane ea PR; hang ha e amohela FPGA_FME_PORT_PR ioctl ho tsoa ho uena, e kopa ts'ebetso e tloaelehileng ea sebopeho ho tsoa ho Motsamaisi oa FPGA ho phethela tokiso ea karoloana ea bitstream ho Port e fanoeng.
• Tsamaiso ea boema-kepe bakeng sa virtualization. Mokhanni oa FME o hlahisa lioctls tse peli, FPGA_FME_PORT_RELEASE, e lokollang Port e fanoeng ho PF; le FPGA_FME_PORT_ASSIGN, e abelang Kou ho khutlela ho PF. Hang ha Port e lokolloa ho PF, e ka abeloa VF ka li-interface tsa SR-IOV tse fanoeng ke mokhanni oa PCIe. Ho fumana lintlha tse ling, sheba "FPGA Virtualization".

Mesebetsi ea Mokhanni oa Sesebelisoa sa FME Platform Module

• E theha node ea sesebelisoa sa litlhaku tsa FME.
• E theha li-sysfs tsa FME files le ho kenya lisebelisoa tsa FME sysfs file basebedisi.
• E kenya tšebetsong li-driver tse nyane tsa likarolo tsa poraefete tsa FME.
• Bakhanni ba likarolo tsa poraefete tsa FME:
  • Sehlooho sa FME
  • Tsamaiso ea Mocheso
  • Tsamaiso ea Matla
  • Phoso ea Lefatše
  • Phetoho e sa Feleng
  • Ts'ebetso ea Lefatše

Port Platform Module Device Driver
Ho tšoana le mokhanni oa FME, mokhanni oa FPGA Port (le AFU) (intel-fpga-afu. ko) oa hlahlojoa hang ha sesebelisoa sa sethala sa Port se theoa. Mosebetsi o ka sehloohong oa mojule ona ke ho fana ka sehokelo bakeng sa lits'ebetso tsa sebaka sa basebelisi ho fihlella li-accelerator ka bomong, ho kenyeletsoa taolo ea reset ea mantlha Port, thomello ea sebaka sa AFU MMIO, ts'ebeletso ea 'mapa oa DMA buffer, tsebiso ea UMsg(1), le lits'ebetso tsa ho lokisa tse hole. bona ka holimo).

UMsg e tšehetsoa feela ka Acceleration Stack bakeng sa Intel Xeon® Processor e nang le FPGA e Kopanetsoeng.

Mesebetsi ea Mokhanni oa Sesebelisoa sa Port Platform Module

• E theha node ea sesebelisoa sa litlhaku tsa Port.
• E theha Port sysfs files le ho kenya lisebelisoa tsa Port sysfs file basebedisi.
• E kenya tšebetsong li-sub-drivers tsa Port poraefete.
• Bakhanni ba likarolo tsa poraefete tsa Port:
  • Sehlooho sa Port
  • AFU
  • Phoso ea Boema-kepe
  • UMsg(2)
  • Tlanya ka Letshwao

Kemiso ea Sesebelisoa sa FPGA
Karolo ena e hlahisa mokhoa oa ho bala sesebelisoa sa FPGA ho tsoa ho sehlopha sa sysfs tlasa /sys/class/fpga. Ka mohlalaampka tlase, lisebelisoa tse peli tsa Intel FPGA li kentsoe moamoheli. Sesebelisoa se seng le se seng sa FPGA se na le FME e le 'ngoe le likou tse peli (AFUs). Bakeng sa sesebelisoa se seng le se seng sa FPGA, buka ea sesebelisoa e etsoa tlasa /sys/class/fpga:

/sys/class/fpga/intel-fpga-dev.0
/sys/class/fpga/intel-fpga-dev.1

Node e 'ngoe le e' ngoe e na le FME e le 'ngoe le Ports tse peli (AFUs) e le lisebelisoa tsa bana:
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-fme.0
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-port.0
/sys/class/fpga/intel-fpga-dev.0/intel-fpga-port.1
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-fme.1
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-port.2
/sys/class/fpga/intel-fpga-dev.1/intel-fpga-port.3

Ka kakaretso, li-interface tsa FME/Port sysfs li bitsoa ka tsela e latelang:
/sys/class/fpga/intel-fpga-dev.i/intel-fpga-fme.j/
/sys/class/fpga/intel-fpga-dev.i/intel-fpga-port.k/

ka ho etsa linomoro ka tatellano lisebelisoa tsohle tsa linkho, j ka tatellano ea linomoro tsa li-FME le k ka tatellano ea linomoro tsa Maemakepe kaofela.

Li-node tsa sesebelisoa tse sebelisetsoang ioctl() le mmap() li ka boleloa ka:
/dev/intel-fpga-fme.j
/dev/intel-fpga-port.k

Palo ea Bakhanni ba PCIe
Karolo ena e fana ka pheletsoview ea phallo ea khoutu bakeng sa palo ea lisebelisoa e etsoang ke intel-fpga-pci.ko. Mehaho le mesebetsi ea mantlha ea data e totobalitsoe. Karolo ena e lateloa hamolemo ha viewho kenya khoutu ea mohloli e tsamaeang le eona (pcie.c).

Libopeho tsa Boitsebiso ba Palo

mofuta oa fpga_id_type {
PARENT_ID,
FME_ID,
PORT_ID,
FPGA_ID_MAX
};
static struct idr fpga_ids[FPGA_ID_MAX];
theha fpga_chardev_info {
const char *lebitso;
dev_t devt;
};
theha fpga_chardev_info fpga_chrdevs[] = {
{ .lebitso = FPGA_FEATURE_DEV_FME },
{ .lebitso = FPGA_FEATURE_DEV_PORT },
};
static struct sehlopha * fpga_class;
static struct pci_device_id cci_pcie_id_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_MCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_MCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_SKX_P),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_SKX_P),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_RCiEP0_DCP),},
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIe_DEVICE_ID_VF_DCP),},
{0,}
};
static struct pci_driver cci_pci_driver = {
.lebitso = DRV_NAME,
.id_table = cci_pcie_id_tbl,
.probe = cci_pci_probe,
.tlosa = cci_pci_remove,
.sriov_configure = cci_pci_sriov_configure
};
struct cci_drvdata {
int device_id;
sesebelisoa sa sebopeho *fme_dev;
struct mutex lock;
struct list_head port_dev_list;
int released_port_num;
struct list_head libaka;
};
struct build_feature_devs_info {
struct pci_dev *pdev;
lefeela __iomem *ioaddr;
lefeela __iomem *ioend;
int current_bar;
lefeela __iomem *pfme_hdr;
struct device * parent_dev;
struct platform_device *feature_dev;
};

Phallo ea Palo

• ccidrv_init()
  • Qala fpga_ids u sebelisa idr_init().
  • Qala fpga_chrdevs[i].devt u sebelisa alloc_chrdev_region().
  • Qala fpga_class u sebelisa class_create ().
  • pci_register_driver(&cci_pci_driver);
• cci_pci_probe()
  • Numella sesebelisoa sa PCI, kopa ho fihlella libaka tsa eona, beha PCI master mode, 'me u lokise DMA.
• cci_pci_create_feature_devs() build_info_alloc_and_init()
  • Fana ka struct build_feature_devs_info, e qale.
    .parent_dev e behiloe bukeng ea motsoali ea sysfs (intel-fpga-dev.id) e nang le likhokahano tsa FME le Port sysfs.
• arola_lethathamo_la_litšobotsi()
  • Tsamaea lethathamong la lisebelisoa tsa BAR0 ho fumana FME, Port, le likarolo tsa bona tsa lekunutu.
• parse_feature() parse_feature_afus() parse_feature_fme()
  • Ha ho kopana le FME:
• build_info_create_dev()
  • Fana ka sesebelisoa sa sethala bakeng sa FME, se boloka ho build_feature_devs_info.feature_dev.
  • feature_dev.id e qalisoa ho sephetho sa idr_alloc(fpga_ids[FME_ID],
  • feature_dev.parent e hlophiselitsoe ho build_feature_devs_info.parent_dev.
  • Abela mefuta e mengata ea lisebelisoa ho feature_dev.resource.
• Abela struct feature_platform_data, e qale, 'me u boloke pointer ho feature_dev.dev.platform_data
  • create_feature_instance() build_info_add_sub_feature()
  • Qala feature_dev.resource[FME_FEATURE_ID_HEADER].
  • feature_platform_data_add()
  • Qala feature_platform_data.features[FME_FEATURE_ID_HEADER], tsohle ntle le .fops.
• parse_feature() parse_feature_afus() parse_feature_port()
  • Ha ho kopana le Port:
• build_info_create_dev()
  • Abela sesebelisoa sa sethala bakeng sa Port, ho boloka ho build_feature_devs_info.feature_dev.
  • feature_dev.id e qalisoa ho latela sephetho sa idr_alloc(fpga_ids[PORT_ID],
  • feature_dev.parent e hlophiselitsoe ho build_feature_devs_info.parent_dev.
  • Abela mefuta e mengata ea lisebelisoa ho feature_dev.resource.
  • Abela struct feature_platform_data, e qale, 'me u boloke pointer ho feature_dev.dev.platform_data
• build_info_commit_dev()
  • Kenya struct feature_platform_data.node bakeng sa Boema-kepe lethathamong la Maemakepe a hlophisitsoeng cci_drvdata.port_dev_list
• create_feature_instance() build_info_add_sub_feature()
  • Qala feature_dev.resource[PORT_FEATURE_ID_HEADER].
• feature_platform_data_add()
  • Qala feature_platform_data.features[PORT_FEATURE_ID_HEADER], tsohle ntle le .fops.
• parse_feature() parse_feature_afus() parse_feature_port_uafu()
  • Ha AFU e kopana le:
• create_feature_instance() build_info_add_sub_feature()
  • Qala feature_dev.resource[PORT_FEATURE_ID_UAFU].
• feature_platform_data_add()
  • Qala feature_platform_data.features[PORT_FEATURE_ID_UAFU], tsohle ntle le .fops.
• parse_feature() parse_feature_private() parse_feature_fme_private()
  • Ha ho kopana le karolo ea lekunutu ea FME:
• create_feature_instance() build_info_add_sub_feature()
  • Qala feature_dev.resource[id].
• feature_platform_data_add()
  • Qala feature_platform_data.features[id], tsohle ntle le .fops.
• parse_feature() parse_feature_private() parse_feature_port_private()
• Ha ho kopana le karolo ea lekunutu ea Port: * create_feature_instance() build_info_add_sub_feature() * Qala tšobotsi_dev.resource[id]. * feature_platform_data_add() Qala feature_platform_data.features[id], tsohle ntle le .fops.
• parse_ports_from_fme()
  • Haeba mokhanni a laetsoe ho Physical Function (PF), joale:
• Matha parse_feature_list() phallo boema-kepeng bo bong le bo bong bo hlalositsoeng sehloohong sa FME.
• Sebelisa BAR e boletsoeng sehloohong se seng le se seng sa Port.

Ho qala sesebelisoa sa FME Platform
Karolo ena e fana ka pheletsoview ea phallo ea khoutu bakeng sa ho qala sesebelisoa sa FME se etsoang ke intel-fpga-fme.ko. Mehaho le mesebetsi ea mantlha ea data e phahamisitsoe. Karolo ena e lateloa hamolemo ha viewho latela khoutu ea mohloli (fme-main.c).

Mehaho ea Boitsebiso ba Sesebediswa sa FME Platform

sebopeho_ops {
int (* init)(struct platform_device *pdev, struct feature *feature);
int (* uinit)(struct platform_device *pdev, struct feature * tšobotsi);
bolelele (* ioctl)(struct platform_device *pdev, sebopeho sa sebopeho * tšobotsi,
int cmd e sa ngolisoang, arg e telele e sa ngolisoang);
int (*test)(struct platform_device *pdev, struct feature *feature);
};
sebopeho sa sebopeho {
const char *lebitso;
int resource_index;
lefeela __iomem *ioaddr;
struct feature_ops *ops;
};
struct feature_platform_data {
struct list_head node;
struct mutex lock;
dev_status e telele e sa ngolisoang;
theha cdev cdev;
struct platform_device *dev;
e sa saenang disable_count;
lefeela *poraefete;
int num;
int (* config_port)(struct platform_device *, u32, bool);
struct platform_device *(*fpga_for_each_port)(struct platform_device*,
lefeela *, int (*match)(struct platform_device *, void *)); sebopeho
likarolo[0];
};
struct perf_object {
int id;
const struct attribute_group **attr_groups;
sesebelisoa sa sebopeho *fme_dev;
struct list_head node;
struct list_head bana;
struct kobject kobj;
};
theha fpga_fme {
u8 port_id;
u64 pr_err;
sesebelisoa sa sebopeho *dev_err;
struct perf_object *perf_dev;
struct feature_platform_data *pdata;
};

Phallo ea ho Qala Sesebelisoa sa FME Platform

Phallo ea ho Qala ea FME

• fme_probe() fme_dev_init()
  • Qala sebopeho sa fpga_fme 'me u se boloke sebakeng sa feature_platform_data.private.
• fme_probe() fpga_dev_feature_init() feature_instance_init()
  • Boloka struct feature_ops ho feature_platform_data.features bakeng sa karolo ka 'ngoe e nang le baahi.
  • Letsetsa tshebetso ya teko, haeba e teng, ho tswa ho sebopeho.
  • Letsetsa tšebetso ea init ho tsoa ho sebopeho.
• fme_probe() fpga_register_dev_ops()
  • Theha node ea sesebelisoa sa litlhaku tsa FME, ho ngolisa sebopeho file_ts'ebetso.

Kemiso ea Sesebelisoa sa Port Platform
Karolo ena e fana ka pheletsoview ea phallo ea khoutu bakeng sa ho qalisoa ha sesebelisoa sa koung ho etsoang ke intel-fpga-afu.ko. Mehaho le mesebetsi ea mantlha ea data e totobalitsoe. Karolo ena e lateloa hamolemo ha viewho latela khoutu ea mohloli (afu.c).

Libopeho tsa lisebelisoa tsa lisebelisoa tsa Port Platform

sebopeho_ops {
int (* init)(struct platform_device *pdev, struct feature *feature);
int (* uinit)(struct platform_device *pdev, struct feature * tšobotsi);
bolelele (* ioctl)(struct platform_device *pdev, sebopeho sa sebopeho * tšobotsi,
int cmd e sa ngolisoang, arg e telele e sa ngolisoang);
int (*test)(struct platform_device *pdev, struct feature *feature);
};
sebopeho sa sebopeho {
const char *lebitso;
int resource_index;
lefeela __iomem *ioaddr;
struct feature_ops *ops;
};
struct feature_platform_data {
struct list_head node;
struct mutex lock;
dev_status e telele e sa ngolisoang;
theha cdev cdev;
struct platform_device *dev;
e sa saenang disable_count;
lefeela *poraefete;
int num;
int (* config_port)(struct platform_device *, u32, bool);
struct platform_device *(*fpga_for_each_port)(struct platform_device*,
lefeela *, int (*match)(struct platform_device *, void *));
likarolo tsa sebopeho[0];
};
theha fpga_afu_region {
index ea u32;
lifolakha tsa u32;
boholo ba u64;
u64 offset;
u64 phys;
struct list_head node;
};
theha fpga_afu_dma_region {
u64 user_addr;
u64 bolelele;
u64 iova;
leqephe la sebopeho **maqephe;
struct rb_node node;
bool in_use;
};
theha fpga_afu {
u64 region_cur_offset;
int num_regitions;
u8 num_umsgs;
struct list_head libaka;
struct rb_root dma_regions;
struct feature_platform_data *pdata;
};

Phallo ea ho Qala Sesebelisoa sa Port Platform

Phallo ea ho Qala Boema-kepe

• afu_probe() afu_dev_init()
  • Qala sebopeho sa fpga_afu 'me u se boloke sebakeng sa feature_platform_data.private.
• afu_probe() fpga_dev_feature_init() feature_instance_init()
  • Boloka struct feature_ops ho feature_platform_data.features bakeng sa karolo ka 'ngoe e nang le baahi.
  • Letsetsa tshebetso ya teko, haeba e teng, ho tswa ho sebopeho.
  • Letsetsa tšebetso ea init ho tsoa ho sebopeho.
• afu_probe() fpga_register_dev_ops()
  • Theha node ea sesebelisoa sa sebapali sa Port, ho ngolisa sebopeho file_ts'ebetso.

Li-FME IOCTL
Li-IOCTL tse bitsitsoeng ka mokhoa o bulehileng file descriptor for /dev/intel-fpga-fme.j FPGA_GET_API_VERSION—khutlisa phetolelo ea hajoale e le kakaretso, ho qala ho 0.

FPGA_CHECK_EXTENSION—ha e sebetse hajoale.

FPGA_FME_PORT_RELEASE-arg ke sesupo sa:

theha fpga_fme_port_release {
__u32 argsz; // ka: boholo ba (etsa fpga_fme_port_release)
__u32 lifolakha; // ka: e tlameha ho ba 0
__u32 port_id; // ka: ID ea boema-kepe (ho tloha ho 0) ho lokolla.
};

FPGA_FME_PORT_ASSIGN-arg ke sesupo sa:

theha fpga_fme_port_assign {
__u32 argsz; // ka: sizeof(struct fpga_fme_port_assign)
__u32 lifolakha; // ka: e tlameha ho ba 0
__u32 port_id; // ka: ID ea boema-kepe (ho tloha ho 0) ho abela. (e tlameha ebe ho bile joalo
e lokollotsoe ke FPGA_FME_PORT_RELEASE)
};

FPGA_FME_PORT_PR-arg ke sesupa ho:

theha fpga_fme_port_pr {
__u32 argsz; // ka: sizeof(struct fpga_fme_port_pr)
__u32 lifolakha; // ka: e tlameha ho ba 0
__u32 port_id; // ka: ID ea boema-kepe (ho tloha ho 0)
__u32 buffer_size; // ka: boholo ba bitstream buffer ka li-byte. E tlameha ho ba 4-byte
tsepamisitse.
__u64 buffer_address; // ho: aterese ea ts'ebetso ea bitstream buffer
__u64 boemo; // tsoa: boemo ba phoso (bitmask)
};

Boema-kepe ba IOCTL
Li-IOCTL tse bitsitsoeng ka mokhoa o bulehileng file descriptor for /dev/intel-fpga-port.k FPGA_GET_API_VERSION—khutlisa phetolelo ea hajoale e le kakaretso, ho qala ho 0. FPGA_CHECK_EXTENSION—ha e sa tšehetsoa hajoale.

FPGA_PORT_GET_INFO-arg ke sesupa ho:

theha fpga_port_info {
__u32 argsz; // ka: boholo ba(sebopeho sa fpga_port_info)
__u32 lifolakha; // tsoa: khutlisetsa 0
__u32 num_regitions; // tsoa: palo ea libaka tsa MMIO, 2 (1 bakeng sa AFU le 1 bakeng sa
STP)
__u32 num_umsgs; // tsoa: palo ea UMsg e tšehetsoeng ke hardware
};

FPGA_PORT_GET_REGION_INFO—arg ke sesupo sa:

theha fpga_port_region_info {
__u32 argsz; // ka: boholo ba(sebopeho sa fpga_port_region_info)
__u32 lifolakha; // tsoa: (bitmask) {FPGA_REGION_READ, FPGA_REGION_WRITE,
FPGA_REGION_MMAP }
__u32 index; // ho: FPGA_PORT_INDEX_UAFU kapa FPGA_PORT_INDEX_STP
__u32 padding; // ka: e tlameha ho ba 0
__u64 boholo; // tsoa: boholo ba sebaka sa MMIO ka li-byte
__u64 offset; // Out: offset ea sebaka sa MMIO ho tloha qalong ea sesebelisoa fd
};

FPGA_PORT_DMA_MAP—arg ke sesupa ho:
theha fpga_port_dma_map {
__u32 argsz; // ka: boholo ba(sebopeho sa fpga_port_dma_map)
__u32 lifolakha; // ka: e tlameha ho ba 0 __u64 user_addr; // ka: ts'ebetso ea sebele
aterese. E tlameha ho tsamaisana le leqephe.
__u64 bolelele; // ka: bolelele ba 'mapa ka li-byte. E tlameha ho ba le maqephe a mangata
boholo.
__u64 iova; // tsoa: IO aterese ea sebele };

FPGA_PORT_DMA_UNMAP—arg ke sesupa ho:
theha fpga_port_dma_unmap {
__u32 argsz; // ka: sizeof(sebopeho sa fpga_port_dma_unmap)
__u32 lifolakha; // ka: e tlameha ho ba 0
__u64 iova; // ka: Aterese ea IO e khutlisitsoeng ke e fetileng
FPGA_PORT_DMA_MAP };

• FPGA_PORT_RESET—arg e tlameha ho ba NULL.
• FPGA_PORT_UMSG_ENABLE—arg e tlameha ho ba NULL.
• FPGA_PORT_UMSG_DISABLE-args e tlameha ho ba NULL.

FPGA_PORT_UMSG_SET_MODE—arg ke sesupa ho:

theha fpga_port_umsg_cfg {
__u32 argsz; // ka: boholo ba(sebopeho sa fpga_port_umsg_cfg)
__u32 lifolakha; // ka: e tlameha ho ba 0
__u32 hint_bitmap; // ho: bitmap ea mofuta oa maikutlo oa UMsg. E supa hore li-UMsg ke life
nolofalitsoe.
};

FPGA_PORT_UMSG_SET_BASE_ADDR—

• UMsg e tlameha ho koaloa pele o fana ka ioctl ena.
• Sebaka sa iova se tlameha ho ba sa buffer e kholo ho lekana li-UMsg tsohle (num_umsgs * PAGE_SIZE).
  • Buffer e tšoailoe e le "e sebelisoa" ke taolo ea buffer ea mokhanni.
  • Haeba iova e le NULL, sebaka leha e le sefe se fetileng ha se tsejoe e le "ts'ebelisong".
• arg ke sesupo ho:
  theha fpga_port_umsg_base_addr {
  • u32 argsz; // ka: sizeof(struct fpga_port_umsg_base_addr)
  • lifolakha tsa u32; // ka: e tlameha ho ba 0
  • u64 iova; // ho: Aterese ea IO e tsoang ho FPGA_PORT_DMA_MAP. };

Hlokomela:

• Ho hlakola liphoso tsa koung, o tlameha ho ngola bitmask e nepahetseng ea liphoso tsa hajoale, bakeng sa mohlalaample, katse liphoso > hlakileng
• UMsg e tšehetsoa feela ka Acceleration Stack bakeng sa Intel Xeon processor e nang le FPGA e Kopanetsoeng.

sysfs Files

FME Header sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/

sysfs file	tšimo ea mmio	mofuta	phihlello
nomoro_boemakepe	fme_header.capability.num_ports	decimal int	Bala feela
Cache_size	fme_header.capability.cache_size	decimal int	Bala feela
phetolelo	fme_header.capability.fabric_verid	decimal int	Bala feela
socket_id	fme_header.capability.socket_id	decimal int	Bala feela
bitstream_id	fme_header.bitstream_id	hex uint64_t	Bala feela
bitstream_metadata	fme_header.bitstream_md	hex uint64_t	Bala feela

FME Thermal Management sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/thermal_mgmt/

sysfs file	tšimo ea mmio	mofuta	phihlello
moeli1	thermal.threshold.tmp_thshold1	decimal int	Mosebelisi: Motso oa ho bala feela: Bala-ngola
moeli2	thermal.threshold.tmp_thshold2	decimal int	Mosebelisi: Motso oa ho bala feela: Bala-ngola
threshold_trip	thermal.threshold.therm_trip_thshold	decimal int	Bala feela
monyako1_fihliloe	thermal.threshold.threshold1_boemo	decimal int	Bala feela
monyako2_fihliloe	thermal.threshold.threshold2_boemo	decimal int	Bala feela
threshold1_policy	mocheso. threshold.threshold_policy	decimal int	Mosebelisi: Motso oa ho bala feela: Bala-ngola
mocheso	thermal.rdsensor_fm1.fpga_temp	decimal int	Bala feela

FME Power Management sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/power_mgmt/

sysfs file	tšimo ea mmio	mofuta	phihlello
chesitsoe	matla.boemo.pwr_conssumed	hex uint64_t	Bala feela
moeli1	matla.sehepo.sethitho1	hex uint64_t	Mosebelisi: Motso oa ho bala feela: Bala-ngola
moeli2	matla.sehepo.sethitho2	hex uint64_t	Mosebelisi: Motso oa ho bala feela: Bala-ngola
threshold1_boemo	matla.threshold.threshold1_boemo	decimal e sa saena	Bala feela
threshold2_boemo	matla.threshold.threshold2_boemo	decimal e sa saena	Bala feela
rtl	matla.status.fpga_latency_report	decimal e sa saena	Bala feela

FME Global Error sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/errors/

sysfs file	tšimo ea mmio	mofuta	phihlello
pcie0_liphoso	gerror.pcie0_err	hex uint64_t	Bala-ngola
pcie1_liphoso	gerror.pcie1_err	hex uint64_t	Bala-ngola
ente_phoso	gerror.ras_error_inj	hex uint64_t	Bala-ngola

intel-fpga-dev.i/intel-fpga-fme.j/errors/fme-errors/

sysfs file	tšimo ea mmio	mofuta	phihlello
liphoso	gerror.fme_err	hex uint64_t	Bala feela
phoso_ea pele	gerror.fme_first_err.err_reg_status	hex uint64_t	Bala feela
phoso_e latelang	gerror.fme_next_err.err_reg_status	hex uint64_t	Bala feela
hlakileng	E hlakola liphoso, phoso_ea pele, phoso_e latelang	mefuta e fapaneng ea uint64_t	Ngola feela

Hlokomela:
Ho hlakola liphoso tsa FME, o tlameha ho ngola bitmask e nepahetseng ea liphoso tsa hajoale, mohlalaample katse liphoso > hlakile.

Li-sysfs tsa FME tsa Karolo e Ncha files
intel-fpga-dev.i/intel-fpga-fme.j/pr/

sysfs file	tšimo ea mmio	mofuta	phihlello
interface_id	pr.fme_pr_intfc_id0_h, pr.fme_pre_intfc_id0_l	hex 16-byte	Bala feela

FME Global Performance sysfs files
intel-fpga-dev.i/intel-fpga-fme.j/dperf/clock

sysfs file	tšimo ea mmio	mofuta	phihlello
oache	gperf.clk.afu_interf_clock	hex uint64_t	Bala feela

intel-fpga-dev.i/intel-fpga-fme.j/dperf/cache/ (Ha e sebetse bakeng sa Acceleration Stack bakeng sa Intel Xeon CPU e nang le FPGAs)

sysfs file	tšimo ea mmio	mofuta	phihlello
qhoqhoa	gperf.ch_ctl.freeze	decimal int	Bala-ngola
bala_otla	gperf.CACHE_RD_HIT	hex uint64_t	Bala feela
bala_feta	gperf.CACHE_RD_MISS	hex uint64_t	Bala feela
ngola_otla	gperf.CACHE_WR_HIT	hex uint64_t	Bala feela
ngola_feta	gperf.CACHE_WR_MISS	hex uint64_t	Bala feela
tshoara_kopo	gperf.CACHE_HOLD_REQ	hex uint64_t	Bala feela
tx_req_stall	gperf.CACHE_TX_REQ_STALL	hex uint64_t	Bala feela

sysfs file	tšimo ea mmio	mofuta	phihlello
rx_req_stall	gperf.CACHE_RX_REQ_STALL	hex uint64_t	Bala feela
data_write_port_contention	gperf.CACHE_DATA_WR_PORT_CONTEN	hex uint64_t	Bala feela
tag_ngola_port_contention	gperf.CACHE_TAG_WR_PORT_CONTEN	hex uint64_t	Bala feela

intel-fpga-dev.i/intel-fpga-fme.j/dperf/iommu/ (Ha e sebetse bakeng sa Acceleration Stack bakeng sa Intel Xeon CPU e nang le FPGAs)

sysfs file	tšimo ea mmio	mofuta	phihlello
qhoqhoa	gperf.vtd_ctl.freeze	decimal int	Mosebelisi: Motso oa ho bala feela: Bala-ngola

intel-fpga-dev.i/intel-fpga-fme.j/dperf/iommu/afuk/ (Ha e sebetse bakeng sa Acceleration Stack bakeng sa Intel Xeon CPU e nang le FPGAs)

sysfs file	tšimo ea mmio	mofuta	phihlello
bala_transaction	gperf.VTD_AFU0_MEM_RD_TRANS	hex uint64_t	Bala feela
ngola_transaction	gperf.VTD_AFU0_MEM_WR_TRANS	hex uint64_t	Bala feela
tlb_read_hit	gperf.VTD_AFU0_TLB_RD_HIT	hex uint64_t	Bala feela
tlb_write_hit	gperf.VTD_AFU0_TLB_WR_HIT	hex uint64_t	Bala feela

intel-fpga-dev.i/intel-fpga-fme.j/dperf/fabric/

sysfs file	tšimo ea mmio	mofuta	phihlello
nolofalletsa	gperf.fab_ctl.(sebelisoa)	decimal int	Mosebelisi: Motso oa ho bala feela: Bala-ngola
qhoqhoa	gperf.fab_ctl.freeze	decimal int	Mosebelisi: Motso oa ho bala feela: Bala-ngola
pcie0_bala	gperf.FAB_PCIE0_RD	hex uint64_t	Bala feela
pcie0_ngola	gperf.FAB_PCIE0_WR	hex uint64_t	Bala feela
pcie1_bala	gperf.FAB_PCIE1_RD	hex uint64_t	Bala feela
pcie1_ngola	gperf.FAB_PCIE1_WR	hex uint64_t	Bala feela
upi_bala	gperf.FAB_UPI_RD	hex uint64_t	Bala feela
upi_ngola	gperf.FAB_UPI_WR	hex uint64_t	Bala feela

intel-fpga-ev.i/intel-fpga/fme.j/dperf/fabric/portk/

sysfs file	tšimo ea mmio	mofuta	phihlello
pcie0_bala	gperf.FAB_PCIE0_RD	hex uint64_t	Bala feela
pcie0_ngola	gperf.FAB_PCIE0_WR	hex uint64_t	Bala feela
pcie1_bala	gperf.FAB_PCIE1_RD	hex uint64_t	Bala feela
pcie1_ngola	gperf.FAB_PCIE1_WR	hex uint64_t	Bala feela
upi_bala	gperf.FAB_UPI_RD	hex uint64_t	Bala feela
upi_ngola	gperf.FAB_UPI_WR	hex uint64_t	Bala feela

Port Header sysfs files
intel-fpga-dev.i/intel-fpga-port.k/

sysfs file	tšimo ea mmio	mofuta	phihlello
id	port_header.capability.port_number	decimal int	Bala feela
ltr	port_header.control.latency_tolerance	decimal int	Bala feela

Port AFU Header sysfs files
intel-fpga-dev.i/intel-fpga-port.k/

sysfs file	tšimo ea mmio	mofuta	phihlello
afu_id	afu_header.guid	hex 16-byte	Bala feela

Phoso ea Boema-kepe sysfs files
intel-fpga-dev.i/intel-fpga-port.k/errors/

sysfs file	tšimo ea mmio	mofuta	phihlello
liphoso	phoso.port_error	hex uint64_t	Bala feela
phoso_ea pele	phoso.port_first_error	hex uint64_t	Bala feela
first_malformed_req	phoso.malreq	hex 16-byte	Bala feela
hlakileng	phoso.(liphoso tsohle)	mefuta e fapaneng ea uint64_t	Ngola feela

Hlokomela:
Ho hlakola liphoso tsa Port, o tlameha ho ngola bitmask e nepahetseng ea liphoso tsa hajoale, mohlalaample katse liphoso > hlakile.

Nalane ea Phetoho

Tokomane Version	Liphetoho
2017.10.02	Phatlalatso ea Pele.

OPAE Intel FPGA Linux Device Driver Architecture Guide

Litokomane / Lisebelisoa

Intel OPAE FPGA Linux Device Driver Architecture [pdf] Bukana ea Mosebelisi OPAE FPGA Linux Device Driver Architecture, OPAE FPGA, Linux Device Driver Architecture, Driver Architecture, Architecture

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• Bukana ea Mosebelisi