DSP Builder bakeng sa Intel FPGAs
Tlhahisoleseding ya Sehlahiswa
Sehlahisoa se bitsoa DSP Builder bakeng sa Intel FPGAs. Ke sesebelisoa sa software se lumellang basebelisi ho rala le ho kenya tšebetsong li-algorithms tsa digital signal processing (DSP) ho Intel FPGAs. Sesebelisoa se fana ka sebopeho sa graphical se kopanyang le The MathWorks MATLAB le sesebelisoa sa Simulink, se lumellang basebelisi ho etsa mekhoa ea DSP ka mokhoa oa ho thibela litšoantšo. Sesebelisoa se na le liphetolelo tse fapaneng, 'me mofuta oa morao-rao ke 22.4. Sehlahisoa se fetile lintlafatso tse 'maloa, 'me tokiso e' ngoe le e 'ngoe e hlahisa likarolo tse ncha, litokiso tsa liphoso, le lintlafatso. Tafole ea nalane ea ntlafatso e fana ka kakaretso ea liphetoho tse entsoeng phetolelong ka 'ngoe. Sehlahisoa se na le likhatiso tse peli tsa blockset: blockset e tloaelehileng le blockset e tsoetseng pele. Blockset e tloaelehileng e fumaneha bakeng sa Intel Quartus Prime Standard Edition, ha blockset e tsoetseng pele e fumaneha bakeng sa Intel Quartus Prime Pro Edition le Intel Quartus Prime Standard Edition. Sehlahisoa se na le litlhoko tsa tsamaiso tse lokelang ho finyelloa bakeng sa ho kenya le ho sebelisoa hantle. E hloka bonyane mofuta o le mong oa The MathWorks MATLAB le sesebelisoa sa Simulink, ka ts'ehetso ea mefuta ea 64-bit ea MATLAB. Mofuta oa software oa Intel Quartus Prime o lokela ho ts'oana le mofuta oa DSP Builder bakeng sa Intel FPGAs e sebelisoang. Blockset e tsoetseng pele e sebelisa mefuta ea lintlha tse tsitsitseng tsa Simulink bakeng sa ts'ebetso eohle 'me e hloka mefuta e nang le tumello ea Simulink Fixed Point. Intel e boetse e khothaletsa DSP System Toolbox le Communications System Toolbox bakeng sa ts'ebetso e eketsehileng.
Litaelo tsa Tšebeliso ea Sehlahisoa
- Netefatsa hore o na le mofuta o lumellanang oa The MathWorks MATLAB le sesebelisoa sa Simulink se kentsoeng setsing sa hau sa mosebetsi. Sesebelisoa se tšehetsa feela mefuta ea 64-bit ea MATLAB.
- Etsa bonnete ba hore u kentse mofuta o nepahetseng oa Intel Quartus Prime software. Mofuta o lokela ho ts'oana le mofuta oa DSP Builder bakeng sa Intel FPGAs eo u e sebelisang.
- Qala DSP Builder bakeng sa Intel FPGAs 'me u bule sebopeho sa graphical.
- Rala sistimi ea hau ea DSP u sebelisa mokhoa oa block diagram e fanoeng ke sesebelisoa. Sebelisa li-block le likarolo tse teng ho theha algorithm eo u e batlang.
- Nka advantage ea mefuta ea lintlha tse tsitsitseng tsa Simulink bakeng sa lits'ebetso tsohle tse moralong oa hau. Netefatsa hore o na le laesense e hlokahalang bakeng sa Simulink Fixed Point.
- Haeba o hloka tšebetso e eketsehileng, nahana ka ho sebelisa DSP System Toolbox le Communications System Toolbox, tse khothaletsoang ke Intel.
- Hang ha moralo oa hau o phethiloe, o ka hlahisa tse hlokahalang files bakeng sa ho hlophisa Intel FPGA.
Ka ho latela litaelo tsena tsa tšebeliso, u tla khona ho rala le ho kenya tšebetsong li-algorithms tsa DSP ho Intel FPGAs u sebelisa DSP Builder bakeng sa Intel FPGAs.
DSP Builder bakeng sa Lintlha tsa Phatlalatso tsa Intel® FPGAs
Lintlha Tse Amanang
- Motheo oa Tsebo
- Kemiso ea Software le Lilaesense
Phoso
Errata ke bofokoli ba ts'ebetso kapa liphoso, tse ka etsang hore sehlahisoa se khelohe litlhalosong tse hatisitsoeng. Litaba tsa litokomane li kenyelletsa liphoso, litlhaloso tse sa hlakang, kapa tse siiloeng ho tsoa ho litlhaloso tse hatisitsoeng kapa litokomane tsa sehlahisoa.
Bakeng sa tlhaiso-leseling e felletseng mabapi le errata le liphetolelo tse anngoeng ke errata, sheba leqephe la Knowledge Base la Intel®. websebaka.
Lintlha Tse Amanang
Motheo oa Tsebo
DSP Builder bakeng sa Intel FPGAs Advanced Blockset Revision History
| Phetolelo | Letsatsi | Tlhaloso |
| 22.4 | 2022.12.12 | Moqapi oa Enjine ea Matrix e Ekelitsoeng Example. |
| 22.3 | 2022.09.30 | • Tshebetso e ntlafetseng:
- DSP Builder joale e sebelisa FP DSP block bakeng sa FP16 le Bfloat16, e pota-potiloeng ka nepo, Eketsa, Sub or AddSub lisebelisoa tsa Intel Agilex - E fane ka phihlello ea meralo ea DSP e boima le e bobebe ea DSP bakeng sa lintlha tse hlakileng le tsa tlhaho ho blockset ea DSP Builder. - e ntlafalitse ts'ebeliso ea kelello ea FP FFT bakeng sa liforomo tse peli tse nepahetseng tse tlase tsa FP: FP16 le FP19. • Khokahano e ntlafetseng ea meralo ea DSP Builder le IP e 'ngoe ho Moqapi oa Platform. - DSP Builder ha e phutholohe empa e boloka hammoho li-vector tsa (ka boikhethelo) tse rarahaneng e le setsi se le seng sa kotopo. - U ka boela ua abela karolo ea tloaelo ho kotopo. DSP Builder e fana ka li-conduits tse ngata tse nang le mabitso a ikhethang ka ho theha sebopeho ka lebitso la mohlala oa DSP Builder. • Ntlafatsa tlhophiso ea kamehla ea FFT li-blocks ho fokotsa liphoso ha u fetola liparamente tsa FFT. • Fana ka kgetho ya ho reset boemo ba ka hare ba MOTSOALLE thibela nakong ea ho tsosolosa mofuthu. • E kentse laebrari e nang le li-block tsa Simulink tse tšehetsoeng ke DSP Builder. |
| 22.2 | 2022.03.30 | E fokotsehile ho pheta-pheta ka hare KHOPO thibela ho fokotsa tšebeliso ea lisebelisoa le ho eketsa ho nepahala. |
| e tsoela pele… | ||
| Phetolelo | Letsatsi | Tlhaloso |
| 22.1 | 2022.06.30 | • E kentse tlaleho ea latency ho GPIO block (e ts'oanang le tlaleho ea latency ho the Channel IO
diboloko). • E kentse lebasetere morao-rao VFFT thibela, e ts'ehetsang phallo e tsoelang pele ea data ha boholo ba FFT bo fetoha ntle le ho phunya phaephe ea FFT. • Tšehetso e ekelitsoeng bakeng sa Intel Cyclone 10 LP, Intel MAX 10, Cyclone IV E+GX ho DSP Builder Advanced Pro. U tlameha ho bokella RTL e hlahisitsoeng ka khatiso ea Intel Quartus Std. • E atolositse mokhoa oa ho laola phihlello ea ho bala ho SharedMems thibela • E ntlafalitse ho paka li-block tsa DSP ka ho fetola Eketsa, Sub, le Mox ho ya ka matla AddSub thibela |
| 21.4 | 2021.12.30 | E kentsoe AXI4StreamReceiver le AXI4StreamTransmitter ho ea Phallela laeborari |
| 21.3 | 2021.09.30 | • E kentse Laeborari ea DFT ka DFT, ReorderBlock, le ReorderAndRescale diboloko
• Tšehetso e ekelitsoeng bakeng sa lisebelisoa tsa Cyclone V • Litaolo tse kentsoeng tsa phihlello ea ho bala (RA) ho liboloko tsa memori tsa DSP Builder • E kentse blockset e nolofalitsoeng ea morao-rao ea FFT • Ho eketsoa bokhoni ba ho kenya DSP Builder e ikemetseng ntle le ho hloka ts'ebetso ea Intel Quartus Prime e lumellanang le mofuta. |
| 21.1 | 2021.06.30 | • E kentsoe Finite State Machine thibela le moralo example.
• Tšehetso e ekelitsoeng bakeng sa mofuta oa MATLAB: R2020b |
| 20.1 | 2020.04.13 | Sekhetho sa sesebelisoa se tlositsoe Lisebelisoa tsa lisebelisoa phanele. |
| 2019.09.01 | Tšehetso e ekelitsoeng bakeng sa lisebelisoa tsa Intel Agilex®. | |
| 19.1 | 2019.04.01 | • Tšehetso e ekelitsoeng bakeng sa mefuta e 'meli e mecha ea lintlha tse phaphametseng float16_m7 (bfloat) le float19_m10.
• E kenyelelitsoe ho latela latency tšobotsi. • E kentse tlaleho ea boemo ba FIFO buffer. |
| 18.1 | 2018.09.17 | • Ho kenngoa ha HDL.
• Meetso ea software ea C++ e ekelitsoeng. |
| 18.0 | 2018.05.08 | • Tšehetso e ekelitsoeng bakeng sa ho fokotsa ho seta bocha ha meralo ea DSP Builder. Phokotso ea ho seta bocha e etsa qeto ea hore na kemiso e nyane hakae ea lirejisete moahong o hlokang ho hlophisoa bocha, ha ho ntse ho bolokoa tšebetso e nepahetseng ea moralo. Ho fokotsa palo ea lirejisetara tseo DSP Builder li setang bocha li ka fana ka boleng bo ntlafetseng ba liphetho, ke hore, sebaka se fokotsehileng le ho eketseha ha Fmax.
• E kentse tšehetso bakeng sa libaka tse nyenyane ho SharedMem thibela. Makala ana a fana ka ts'ebetso e ts'oanang le ts'ehetso e teng ea karolo e teng ho RegField le RegOut diboloko. • Tshehetso ya beta e kentsweng bakeng sa ho tlisa HDL, e kenyeletsang VHDL kapa Verilog HDL meralo e entsweng ka sebopeho sa DSP Builder. Joale o ka etsisa moralo o tsoang kantle ho naha ka likarolo tsa DSP Builder Simulink. Ho kenya HDL ho kenyelletsa sebopeho se fokolang sa mosebelisi, empa se hloka ho seta ka letsoho. Ho sebelisa tšobotsi ena, o hloka laesense ea sesebelisoa sa MathWorks HDL Verifier. |
| 17.1 | 2017.11.06 | • E kentse super-sample NCO moralo example.
• Tšehetso e ekelitsoeng bakeng sa lisebelisoa tsa Intel Cyclone® 10 le Intel Stratix® 10. • Maemo a tlositsoeng a Lipontšo thibela. • hlakolwa WYSIWYG kgetho on SynthesisInfo thibela. |
| 17.0 | 2017.05.05 | • E rehiloe bocha joalo ka Intel
• E qheletsoe ka thoko Lipontšo thibela • Moqapi o kentsoeng oa Gaussian le Random Number Generator examples • Ho eketsoa ka boholo bo feto-fetohang ba supersampe etelletseng pele FFT moralo example • E kentsoe HybridVFFT thibela • E kentsoe GeneralVTwiddle le KakaretsoMultVTwiddle diboloko |
| 16.1 | 2016.11.10 | • E kentse 4-channel 2-antenna DUC le DDC bakeng sa moralo oa litšupiso tsa LTE
• E kentse BFU_simple block • E thehile likhatiso tsa Standard le Pro. Pro e tšehetsa lisebelisoa tsa Arria 10; Standard e tšehetsa malapa a mang kaofela. • E tlositsoe Lipontšo thibela • Ts'ebetso e kentsoeng bakeng sa ho seta li-setting tsa Avalon-MM interface ho menu ea DSP Builder |
| e tsoela pele… | ||
| Phetolelo | Letsatsi | Tlhaloso |
| 16.0 | 2016.05.02 | • Lilaebrari tse hlophisitsoeng bocha
• Liphetho tse ntlafetseng tsa ho mena ho lisebelisoa tsa MAX 10 • E kentse mohlala o mocha oa moraloamphanyane: - Jenereithara ea linomoro tsa Gaussian Random — DUC_4C4T4R le DDC_4C4T4R LTE digital-up and down-conversion • E kentse leano le lecha la ho faola la FFT: prune_to_widths() |
| 15.1 | 2015.11.11 | • E qheletsoe ka thoko Matha Quartus II le Matha Modelsim diboloko
• Ts'ehetso ea ho tšela oache e ekelitsoeng • E kentsoe lihloela tsa FIR tse lokiselitsoeng bocha • Libaka tse ntlafetseng tsa libese: - Ho hlahloba liphoso le ho tlaleha ho ntlafalitsoe - Ketsiso e nepahetseng e ntlafalitsoeng - Ts'ebetso e ntlafalitsoeng ea makhoba a libese - Ho tšela oache ho ntlafalitsoe • Fetola lihokelo tse ling tsa Avalon-MM • E kentse li-blocks tse ncha: — Tšoara Litekanyetso — Fanout — Khutsa — Vectorfanout • IIR e ekelitsoeng: lintlha tse felletseng tsa boemo bo felletseng le IIR: li-demos tsa boemo bo felletseng ba maemo a holimo • Fetisetsa le ho amohela moralo oa litšupiso tsa modem |
| 15.0 | Motšeanong 2015 | • Tšehetso e ekelitsoeng bakeng sa tlhahiso ea SystemVerilog
• E kentse laeborari ea mehopolo ea kantle • E kentsoe Mehopolo ea kantle thibela • E kentsoe e ncha Lumella ho ngola likoung tse peli parameter ho DualMem thibela • Fetola liparamente ho Litlhophiso tsa AvalonMMSlave thibela |
| 14.1 | Tšitoe 2014 | • Tšehetso e ekelitsoeng bakeng sa li-block tsa Arria tse 10 tse thata-thata
• E kentse BusStimulus le BusStimulusFileLi-block tsa lirejisete tse entsoeng ka memori tsa moralo example. • E kentse AvalonMMSlaveSettings thibela le Sehahi sa DSP> Li-interface tsa Avalon> Lekhoba la Avalon-MM khetho ea menu • E tlositsoe li-parameter tsa libese ho li-blocks tsa Control le Signal • E tlositse mohlala o latelang oa moraloamphanyane: - Sefetoleli sa Sebaka sa Mebala (Ho Mena ka Mehloli ea Mehloli) - E kopanya Filter ea FIR e nang le li-Coefficients tse ntlafatsang - Sesefa sa pele sa MOFI (Ho Mena ka Mehloli ea Lisebelisoa) - Motho a le mongtagSesefa sa e IIR (Ho Mena ka Kabelo ea Mehloli) - Metsotso e merarotagSesefa sa e IIR (Ho Mena ka Kabelo ea Mehloli) • E kenyelelitsoe tsamaiso-in-the-lupu tšehetso • E kentse li-blocks tse ncha: - Sehlopha sa lintlha tse phaphametseng - Pokello ea ntlha e phaphametseng e ipokellela - E kentse ts'ebetso ea hypotenuse ho block block ea lipalo • Moetso o ekelitsoeng mohlalaamphanyane: - Mobala sebaka converter - MOLLO o rarahaneng - CORDIC ho tsoa ho Primitive Blocks - Phokotso ea lintlha tsa Crest - Ho phutha MOLEMO - Sesefa se feto-fetohang sa Integer Rate Decimation - Mofuta oa Vector - ea tatellano le e pheta-phetoang |
| e tsoela pele… | ||
| Phetolelo | Letsatsi | Tlhaloso |
| • Meetso e ekelitsoeng ea litšupiso:
- Phokotso ea lintlha tsa Crest - RF e tobileng e nang le Synthesizable Testbench - Sefe ea Qeto e Matla - Setlhopha sa Decimation se lokisehang hape - Sesefa se feto-fetohang sa Integer Rate Decimation • Tlosa foldara ea ho arolelana lisebelisoa • Sephutheli se ntlafalitsoeng sa ALU |
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| 14.0 | Phuptjane 2014 | • Tšehetso e ekelitsoeng bakeng sa MAX 10 FPGAs.
• Ho tlosoa tšehetso bakeng sa lisebelisoa tsa Cyclone III le Stratix III • E ntlafalitsoe DSP Builder Run ModelSim khetho, eo hona joale e u lumellang ho tsamaisa ModelSim bakeng sa moralo oa boemo bo holimo kapa li-submodule tsa motho ka mong • Fetotse tlhahiso ea HDL bukeng ea boemo ba sesebelisoa (tlas'a lethathamo le boletsoeng la RTL) ho fapana le lethathamong la lihlopha • E kenyelelitsoe ho bala lets'oao ho segokanyimmediamentsi sa sebolokigolo bese • E kentse boema-kepe bo hlakileng ho FIFO • Liboloko tse 13 tsa FFT li theohile • E kentse mohlala o mocha oa moraloamphanyane: - Avalon-ST Interface (Input and Output FIFO Buffer) e nang le Backpressure - Avalon-ST Interface (Output FIFO Buffer) e nang le Backpressure - Mesebetsi e tsitsitseng ea lipalo - Motso oa lisekoere o sebelisang CORDIC - Normalizer - E tšoanang FFT - Parallel Floating-Point FFT - Motso o sekwere o sebelisa CORDIC - FFT/iFFT e fetohang - Fetoha-Size Fixed-Point FFT - Variable-Size Fixed-Point FFT ntle le BitReverseCoreC Block - Variable-Size Fixed-Point iFFT - Variable-Size Fixed-Point iFFT ntle le BitReverseCoreC Block - E feto-fetohang-Boholo bo Phaphallang-Point FFT - Variable-Size Floating-Point FFT ntle le BitReverseCoreC Block - Variable-Size Floating-Point iFFT - Variable-Size Floating-Point iFFT ntle le BitReverseCoreC Block • E kentse li-blocks tse ncha: - Teeho e Anchored - E nolofalitsoe Delay Line - E nolofalitsoe ho lieha ho fana ka maikutlo - FFT2P, FFT4P, FFT8P, FFT16P, FFT32P, le FFT64P - FFT2X, FFT4X, FFT8X, FFT16X, FFT32X, le FFT64X - FFT2, FFT4, VFFT2, le VFFT4 - Kakaretso ea Multitwiddle le General Twiddle (GeneralMultiTwiddle, GeneralTwiddle) - Hybrid FFT (Hybrid_FFT) - Phaephe e Tšoanang FFT (PFFT_Pipe) — E itokisitse |
| 13.1 | La 2013 Pulungoana XNUMX | • Ts'ehetso e tlositsoe bakeng sa lisebelisoa tse latelang:
— Arria GX - Leholiotsoana II — HardCopy II, HardCopy III, le HardCopy IV - Stratix, Stratix II, Stratix GX, le Stratix II GX • Phallo e ntlafetseng ea ho mena ea ALU • E kentse mesebetsi e mecha ho Math block. |
| e tsoela pele… | ||
| Phetolelo | Letsatsi | Tlhaloso |
| • E kentse khetho ea Simulink fi block ho li-block tsa Const, DualMem, le LUT
• E kentse mohlala o mocha oa moraloamphanyane: - Ho feto-fetoha ho nepahetseng ka nako ea nnete FFT - E kopanya Filter ea FIR ka li-coefficients tse nchafatsang - Sebapali sa tieho ea nako • E kentse li-blocks tse ncha: - Teeho e Anchored - Polynomial — TwiddleAngle - TwiddleROM le TwiddleROMF - VariableBitReverse — VFFT |
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| 13.0 | Motšeanong 2013 | • Boloko ba sesebediswa bo ntlafaditsweng ka menu e ntjha ya ho Khetha Sesebediswa.
• E kentse liboloko tse ncha tsa ModelPrim: — Const Mult — Arola — MinMax - Negate - Sehlahisoa sa Scalar • E kentse liboloko tse ncha tse robong tsa FFT • E kentse lipontšo tse ncha tse leshome tsa FFT |
| 12.1 | La 2012 Pulungoana XNUMX | • E kentse ALU phutha tšobotsi
• E ekelitse mekhoa e ntlafalitsoeng ea lintlha tse phaphametseng • E kentse liboloko tse ncha tse latelang tsa ModelPrim: - AddSub - AddSubFused — CmpCtrl — Lipalo - Boholo le Bonyane — MinMaxCtrl — Ho potoloha - Trig • E kentse liboloko tse ncha tse latelang tsa FFT: - Edge Detect (EdgeDetect) - Pulse Divider (PulseDivider) - Pulse Multiplier (PulseMultiplier) - Bit-Reverse FFT e nang le Natural Output (FFT_BR_Natural) • E kentse moralo o mocha o latelang oa FIR examphanyane: - Super-sample ho fokotsa sefahla sa FIR - Super-sampfilthara ea FIR e fokolang • E kentse boemo, lebelo, le taolo ea hajoale bakeng sa li-motors tsa AC (tse nang le ALU phutha) moralo oa example |
Lintlha Tse Amanang
DSP Builder Advanced Blockset Handbook
Litlhoko tsa Tsamaiso
- DSP Builder bakeng sa Intel FPGAs e hokahana le MathWorks MATLAB le lisebelisoa tsa Simulink le software ea Intel Quartus® Prime.
- Netefatsa hore bonyane mofuta o le mong oa The MathWorks MATLAB le sesebelisoa sa Simulink oa fumaneha sebakeng sa hau sa mosebetsi pele u kenya DSP Builder bakeng sa Intel FPGAs. U lokela ho sebelisa mofuta o tšoanang oa software ea Intel Quartus Prime le DSP Builder bakeng sa Intel FPGAs. DSP Builder bakeng sa Intel FPGAs e tšehetsa feela mefuta ea 64-bit ea MATLAB.
- Ho tloha ho v18.0, DSP Builder bakeng sa Intel FPGAs blockset e tsoetseng pele e fumaneha bakeng sa Intel Quartus Prime Pro Edition le Intel Quartus Prime Standard Edition. DSP Builder bakeng sa Intel FPGAs blockset e tloaelehileng e fumaneha feela bakeng sa Intel Quartus Prime Standard Edition.
Letlapa la 2. Sehahi sa DSP bakeng sa Litšepiso tsa Intel FPGAs MATLAB
| Phetolelo | Liphetolelo tse tšehelitsoeng tsa MATLAB | ||
| DSP Builder Standard Blockset | DSP Builder Advanced Blockset | ||
| Intel Quartus Prime Standard Edition | Khatiso ea Intel Quartus Prime Pro | ||
| 22.4 | Ha e fumanehe | R2022a R2021b R2021a R2020b R2020a | |
| 22.3 | Ha e fumanehe | R2022a R2021b R2021a R2020b R2020a | |
| 22.1 | Ha e fumanehe | R2021b R2021a R2020b R2020a R2019b | |
| 21.3 | Ha e fumanehe | R2021a R2020b R2020a R2019b R2019a | |
| 21.1 | Ha e fumanehe | R2020b R2020a R2019b R2019a R2018b | |
| 20.1 | Ha e fumanehe | R2019b R2019a R2018b R2018a R2017b R2017a | |
| 19.3 | Ha e fumanehe | R2019a R2018b R2018a R2017b | |
| e tsoela pele… | |||
| Phetolelo | Liphetolelo tse tšehelitsoeng tsa MATLAB | ||
| DSP Builder Standard Blockset | DSP Builder Advanced Blockset | ||
| Intel Quartus Prime Standard Edition | Khatiso ea Intel Quartus Prime Pro | ||
| R2017a R2016b | |||
| 19.1 | Ha e tšehetsoe | R2013a | R2018b R2018a R2017b R2017a R2016b |
| 18.1 | R2013a | R2013a | R2018a R2017b R2017a R2016b |
| 18.0 | R2013a | R2013a | R2017b R2017a R2016b R2016a R2015b |
| 17.1 | R2013a | R2013a | R2016a R2015b R2015a R2014b R2014a R2013b |
Hlokomela:
DSP Builder bakeng sa Intel FPGAs blockset e tsoetseng pele e sebelisa mefuta ea lintlha tse tsitsitseng tsa Simulink bakeng sa ts'ebetso eohle 'me e hloka mefuta e nang le laesense ea Simulink Fixed Point. Intel e boetse e khothaletsa DSP System Toolbox le Communications System Toolbox, tseo ba bang ba li ralang li kileng tsa ba tengamples sebelisa.
Lintlha Tse Amanang
Kenyelletso le Lilaesense tsa Intel Software.
DSP Builder bakeng sa Lintlha tsa Phatlalatso tsa Intel® FPGAs 9
Litokomane / Lisebelisoa
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Intel DSP Builder bakeng sa Intel FPGAs [pdf] Bukana ea Mosebelisi DSP Builder bakeng sa Intel FPGAs, Sehahi sa Intel FPGAs, Intel FPGAs, FPGAs |